In the case where the AUX provides an I2C-over-AUX DDC channel, a
reference is taken on the AUX parent device of the DDC channel rather
than the DDC channel like it would be for regular I2C controllers. To
make sure the correct reference is dropped, move the unreferencing code
into the SOR driver and make sure not to drop the I2C adapter reference
in that case.
Change-Id: I8821ffa49629f808714dae30463d7bf4a3466415
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2545951
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
It's theoretically possible for the runtime PM reference to leak if the
code fails anywhere between the pm_runtime_resume_and_get() and
pm_runtime_put() calls, so make sure to release the runtime PM reference
in that case.
Practically this will never happen because none of the functions will
fail on Tegra, but it's better for the code to be pedantic in case these
assumptions will ever become wrong.
Change-Id: I04d11da45f88ccbae5b007e73344232914480f77
Signed-off-by: Pavel Machek (CIP) <pavel@denx.de>
[treding@nvidia.com: add commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2545947
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
The hardware cursor on Tegra186 differs slightly from the implementation
on older SoC generations. In particular the new implementation relies on
software for clipping the cursor against the screen. Fortunately, atomic
KMS already computes clipped coordinates for (cursor) planes, so this is
trivial to implement.
The format supported by the hardware cursor is also slightly different.
v2: use more drm_rect helpers (Dmitry)
Change-Id: I677aca7680f27b99f29c747f28e43fe4b0bd7c09
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2545942
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
The SOR resets are exclusively shared with the SOR power domain. This
means that exclusive access can only be granted temporarily and in order
for that to work, a rigorous sequence must be observed. To ensure that a
single consumer gets exclusive access to a reset, each consumer must
implement a rigorous protocol using the reset_control_acquire() and
reset_control_release() functions.
However, these functions alone don't provide any guarantees at the
system level. Drivers need to ensure that the only a single consumer has
access to the reset at the same time. In order for the SOR to be able to
exclusively access its reset, it must therefore ensure that the SOR
power domain is not powered off by holding on to a runtime PM reference
to that power domain across the reset assert/deassert operation.
This used to work fine by accident, but was revealed when recently more
devices started to rely on the SOR power domain.
Change-Id: Ifdb94bcafc452e1f2cccd532e98670bf05425ccd
Fixes: 11c632e1cfd3 ("drm/tegra: sor: Implement acquire/release for reset")
Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2545939
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Coupling of display controllers used to rely on runtime PM to take the
companion controller out of reset. Commit fd67e9c6ed5a ("drm/tegra: Do
not implement runtime PM") accidentally broke this when runtime PM was
removed.
Restore this functionality by reusing the hierarchical host1x client
suspend/resume infrastructure that's similar to runtime PM and which
perfectly fits this use-case.
Change-Id: I74817efbdb2afa6f775ad9b8d1657496f4c5626b
Fixes: fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM")
Reported-by: Dmitry Osipenko <digetx@gmail.com>
Reported-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2545938
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
RGB output doesn't allow to change parent clock rate of the display and
PCLK rate is set to 0Hz in this case. The tegra_dc_commit_state() shall
not set the display clock to 0Hz since this change propagates to the
parent clock. The DISP clock is defined as a NODIV clock by the tegra-clk
driver and all NODIV clocks use the CLK_SET_RATE_PARENT flag.
This bug stayed unnoticed because by default PLLP is used as the parent
clock for the display controller and PLLP silently skips the erroneous 0Hz
rate changes because it always has active child clocks that don't permit
rate changes. The PLLP isn't acceptable for some devices that we want to
upstream (like Samsung Galaxy Tab and ASUS TF700T) due to a display panel
clock rate requirements that can't be fulfilled by using PLLP and then the
bug pops up in this case since parent clock is set to 0Hz, killing the
display output.
Don't touch DC clock if pclk=0 in order to fix the problem.
Change-Id: Id8bece2a314f354bacbab4e567d7fbd8470d1c3c
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2545937
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Support newer VIC firmware by accepting the new magic number 0x10fe,
loading the full code segment instead of just the first page at boot
time, and skipping FCE setup if the firmware header indicates that
FCE is handled internally by the firmware.
JIRA LS-34
Change-Id: I97c394ace6557a589901b2c4b2ad1b72619cbf66
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2498819
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Trivial clean-up for building Tegra DRM by ...
1. Removing the Kconfig file because this is not needed for building
as an external module and we only plan to build this as an external
module.
2. Move the header file 'tegra_drm_next.h' under the Tegra DRM source
directory so that we don't need to pass the path for finding the
header when building Tegra DRM as an external module.
3. Remove the 'CONFIG_DRM_TEGRA_NEXT' variable because we always build
Tegra DRM as a module.
Bug 200687525
Change-Id: I79661fa7eaf548646277e5e89adab198383bf466
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2485761
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
The Host1x driver will skip DMA API calls if the pin call for a
buffer returns a physical address directly. This is not desirable
even when the IOMMU is disabled, because then we don't get the
cache flushing done by DMA API. As such, remove the direct path.
This patch will be included as part of upstream v6 patch.
Change-Id: I0a7806ae550e548bb567427c327a0d5890718a1e
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2488295
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
For Linux v5.11, there are a some changes to the DRM APIs that require
updates to the Tegra DRM driver. These are:
1. Commit 6619ccf1bb1d ("dma-buf: Use struct dma_buf_map in
dma_buf_vmap() interfaces") changes to the dma_buf_vmap() and
dma_buf_vunmap() APIs to pass a new parameter of type
'struct dma_buf_map'.
2. Commit 351f950db4ab ("drm/atomic: Pass the full state to CRTC atomic
enable/disable) and commit f6ebe9f9c923 ("drm/atomic: Pass the full
state to CRTC atomic begin and flush") changes the structure type
passed to APIs referenced by the commits.
Finally, commit dd311c6fe8af ("drm/tegra: Introduce GEM object
functions") update the Tegra DRM driver to use GEM object functions.
Update the Tegra DRM driver to support these updated APIs for
Linux v5.11+ and align with the latest changes.
Bug 200687525
Change-Id: I7b11c3f4c4f03afe23563a3de12170c7543c28fe
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2469985
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Add the upstream tegra-drm driver with the 'Host1x/Tegra UAPI' series
[0] applied. This driver will be built as an external module for testing
and development with upstream Linux kernels.
The following modifications have been made to the series posted upstream
1. Update the Makefile to always build the driver as a module
2. Always enable the tegra_drm_ioctl_xxx in the tegra_drm_ioctls and
remove the dependency on CONFIG_DRM_TEGRA_STAGING.
3. Rename the include/uapi/drm/tegra_drm.h to
include/uapi/drm/tegra_drm_next.h to avoid conflicts with upstream
headers when building as an external module.
5. Rename the module that is built to be tegra-drm-next.ko instead of
tegra-drm.ko to avoid any depmod conflicts with the upstream driver.
[0] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=215770
Bug 3156385
Change-Id: I19206f989325c9c6ff3c2b9301d964140d52234f
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2435802
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Update all Kconfig files and Makefiles to rely on the kernel overlay
feature. In particular, don't include any Kconfig files or Makefiles
from other overlays. -I directives in CFLAGS are not yet cleaned up.
Bug 1978395
Change-Id: I425d37d55f8ea61fb3a082a1504f994ff30cec03
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1561187
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
t18x repo will be discontinued and all code that
resides there is moved into nvidia/.
So, every reference to t18x/ should be corrected
to nvidia/
Bug 200295104
Change-Id: I01ca1118de043511edca829e1cb2b8b52fb398df
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Makefiles and Kconfig files are picked up based
on project name being the extension.
Makefiles and Kconfig files brought over from
t18x have .t18x suffix.
Changed to .nvidia
Bug 200295104
Change-Id: Idade26f293c1faaf74f53b2ab20798c47652bdb9
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
Use the header <soc/tegra/kfuse.h> for kfuse defines instead of
legacy header <linux/platform/tegra/tegra_kfuse.h>.
The legacy header for kfuse <linux/platform/tegra/tegra_kfuse.h>
is going to be removed.
bug 200257381
Change-Id: I83b894e1d912b87fde7b24b78c54a633027e0c09
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1291988
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Shardar Mohammed <smohammed@nvidia.com>
Reviewed-by: Sujeet Baranwal <sbaranwal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Preparing the drm/tegra folder for integrating the
drivers of drm from kernel/nvidia.
Change-Id: Ia15d4e31d951f7c04dd17f189106032146f47f6d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Guest VM has access to all of the profiler carveout right now so that
it can read full carveout and dump all the entries.
Right now address and size of Guest VM owned profiler carveout is parsed
from kernel command line. And the address of full profiler carveout
(containing logs of other VMs too) is calculated based on assumptions.
Current architecture is now getting reworked so that only a privileged
Guest VM can access full carveout and that too in read-only mode. Each
VM will have read-write access to its own carveout to read/write
profiler entries of that VM.
Update tegra_bootloader_debug_init.c to parse tegra_bl_prof_ro_start and
tegra_bl_prof_ro_size from kernel command line. These values indicate
address and size of the full read only carveout.
In tegra_bootloader_debuginit(), map the address of read only carveout
to tegra_bl_mapped_prof_ro_start and set is_privileged_vm to true.
Only privileged VM will be assigned this read only address by BL.
tegra_bl_mapped_prof_start continues to map to read-write carveout
owned by the VM.
Update profiler_show() so that it reads entries from the read-only
carveout if is_privileged_vm is set, otherwise it reads from read
write carveout.
Bug 3566403
Change-Id: I3c1e5d42d67f7724c6fa43b7e27f08ce2cd607b7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2868921
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
