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Tegra spi slave driver for T124 and later chips. Fix build error as "'fpclk_name' may be used uninitialized". Check and avoid divide by zero where clock rate can be zero while selecting best clock. SPI slave controller clock should be between 1.5 times to 4 times of interface clock. Currently it is set to 4 times. Change it to 3 times to avoid border cases where actual clock is not same as what is requested. Ex: master is set to .99MHz when 1MHz is requested and slave is set to 4MHz as requested. Here above rule is violated. SPI slave controller clock should be 1.5x of interface clock. Change it to 2x to avoid border cases where actual clock set is not same as what is requested. Ex: master is set to 1MHz and slave is set to 1.48MHz instead of 1.5MHz as requested. Here above rule is violated. Set max buffer size to dma buffer size if dma init is successful Change based on below commits from linux-5.10 9de18723 spi: handle dma_slave_config error. 3a33b5fb spi: fix mem leak in spi slave driver 4b9b15ae drivers: Fix compile errors seen while merging 'v5.10-rc2' Change based on below commits from linux-4.9 76a47a65 spi: tegra124-slave: tegra124 spi slave driver 2c341aa0 drivers: spi: fix -werror b511c6f4 spi: tegra: Avoid divide by zero error fdd18c3f spi: slave: Fix controller clock multiplier 829c57d6 spi: slave: Fix controller clock multiplier 85f8f7c2 spi: tegra: fix max buffer size Bug 200021334 Bug 1899778 bug 1745660 Bug 200304626 Bug 200106113 Bug 200112595 bug 200054134 bug 1585361 Bug 200157229 bug 200116059 Bug 200063654 Bug 200045563 Bug 200084260 Bug 200141432 bug 200194538 bug 200129610 Bug 200319741 Coverity ID: 29578 Bug 200319815 Bug 200379969 Change-Id: Ibfadb40469f30b21350ed0fb7ee5daf96047197d Signed-off-by: Vishwaroop A <va@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2888151 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
7 lines
186 B
Makefile
7 lines
186 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
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obj-m += spi-aurix-tegra.o
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obj-m += spi-tegra210-quad.o
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obj-m += spi-tegra124-slave.o
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