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099e5e1cd7
This driver exposes EMC frequency control interface to user space via linux devfreq framework. Users could change EMC frequency to the frequency value from the available frequencies of EMC clock: $ /sys/class/devfreq/bwmgr# cat available_frequencies 665600000 2750000000 3200000000 4266000000 and update the EMC floor frequency by writing into the min_freq QoS sysfs node: $ /sys/class/devfreq/bwmgr# echo 4266000000 > min_freq and update the EMC max frequency by writing into the max_rate QoS sysfs node to cap the EMC frequency: $ /sys/class/devfreq/bwmgr# echo 4266000000 > max_freq This driver does not directly manage the EMC clock rate. Instead it just delivers the min/max frequency information to BPMP, and BPMP is still the only entity that has the full control of EMC and other related memory clocks. Bug 5483386 Bug 5196455 Change-Id: I6124eeb7411a13bde5c51582064534063abca8d3 Signed-off-by: Johnny Liu <johnliu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3453755 GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
29 lines
635 B
Makefile
29 lines
635 B
Makefile
# SPDX-License-Identifier: GPL-2.0-only
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# Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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tegra-bootloader-debug-objs := tegra_bootloader_debug.o
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obj-m += tegra-bootloader-debug.o
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obj-m += tegra-cactmon-mc-all.o
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ifdef CONFIG_PM_DEVFREQ
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obj-m += tegra-bpmp-bwmgr.o
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endif
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obj-m += tegra-fsicom.o
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obj-m += mce/
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ifdef CONFIG_PERF_EVENTS
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obj-m += uncore_pmu/
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endif
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obj-m += mc-hwpm.o
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obj-m += mc-utils/
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obj-m += dce/
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obj-m += psc/
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ifndef CONFIG_TEGRA_SYSTEM_TYPE_ACK
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obj-m += rtcpu/
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endif
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obj-m += aon/
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obj-m += tegra-uss-io-proxy.o
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obj-m += nvadsp/
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obj-m += tegra-hv-xhci-debug.o
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obj-m += tegra-hv-xhci.o
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