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0e0d2f2c07
Using this patch we are adding support for mttcan driver in oot kernel. JIRA ESLC-6885 Signed-off-by: Manish Bhardwaj <mbhardwaj@nvidia.com> Change-Id: I83a6d43aa99278a546778cf1700e2bd106ec42a9 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2785360 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
63 lines
1.5 KiB
C
63 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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#include "../include/m_ttcan.h"
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void ttcan_clear_intr(struct ttcan_controller *ttcan)
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{
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ttcan_write32(ttcan, ADR_MTTCAN_IR, 0xFFFFFFFF);
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}
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void ttcan_clear_tt_intr(struct ttcan_controller *ttcan)
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{
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ttcan_write32(ttcan, ADR_MTTCAN_TTIR, 0xFFFFFFFF);
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}
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u32 ttcan_read_ir(struct ttcan_controller *ttcan)
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{
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return ttcan_read32(ttcan, ADR_MTTCAN_IR);
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}
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void ttcan_ir_write(struct ttcan_controller *ttcan, u32 value)
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{
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return ttcan_write32(ttcan, ADR_MTTCAN_IR, value);
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}
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void ttcan_ttir_write(struct ttcan_controller *ttcan, u32 value)
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{
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return ttcan_write32(ttcan, ADR_MTTCAN_TTIR, value);
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}
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u32 ttcan_read_ttir(struct ttcan_controller *ttcan)
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{
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return ttcan_read32(ttcan, ADR_MTTCAN_TTIR);
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}
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void ttcan_ier_write(struct ttcan_controller *ttcan, u32 val)
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{
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ttcan_write32(ttcan, ADR_MTTCAN_IE, val);
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}
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void ttcan_ttier_write(struct ttcan_controller *ttcan, u32 val)
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{
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ttcan_write32(ttcan, ADR_MTTCAN_TTIE, val);
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}
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void ttcan_set_intrpts(struct ttcan_controller *ttcan, int enable)
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{
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if (enable) {
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ttcan_write32(ttcan, ADR_MTTCAN_IE, ttcan->intr_enable_reg);
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ttcan_write32(ttcan, ADR_MTTCAN_TTIE,
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ttcan->intr_tt_enable_reg);
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ttcan_write32(ttcan, ADR_MTTCAN_ILE, 0x1);
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} else {
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ttcan_write32(ttcan, ADR_MTTCAN_IE, 0);
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ttcan_write32(ttcan, ADR_MTTCAN_TTIE, 0);
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ttcan_write32(ttcan, ADR_MTTCAN_ILE, 0x0);
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}
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pr_debug("%s:%s intr %x\n", __func__, enable ? "enabled" : "disabled",
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ttcan->intr_enable_reg);
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}
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