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Highlights from current clock handling in machine driver(L4T/Android)
* Tegra210 and Tegra186/194 have different approaches to update clock
rates for pll_a, pll_a_out0, mclk and ahub.
-> Tegra210 uses static method, where base pll_a rate is hardcoded
in the driver.
-> Tegra186/194 use DT driven approach, where sound node passes rates
for above clocks. Two sets of rates are passed, one to support odd
sample rates and one for even.
* Some of the functions from tegra_asoc_utils_alt.c are unused
* clock names are not really generic.
This patch has following updates.
* Unify clock update approach. Use static array for base pll rates.
This also helps to get rid of following sound node DT properties.
"nvidia,num-rates"
"nvidia,clk-rates"
* Remove below unused functions.
tegra_alt_asoc_utils_lock_clk_rate()
tegra_alt_asoc_utils_register_ctls()
tegra_alt_asoc_utils_tristate_dap()
* clk_set_parent() functions are not needed. Instead the relationship
can be set from DT through "assigned-clocks" binding.
* update clock handle names to be more meaningful. However, clock names
that are parsed in devm_clk_get() are not changed because these names
are used in Automotive DT files under "sound_ref" node. Scope of
current patch is limited to L4T/Android drivers and DT files.
Bug 200503387
Bug 200516191
Change-Id: Ideaf150e6e200ffbba4dcbdec4c49f1127ea25db
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2164482
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>