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git://nv-tegra.nvidia.com/linux-nv-oot.git
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db0d9da92f
In Orin and previous chipsets, engine timestamp counter runs 32 times faster than CNTVCT register, so the actual timestamp is obtained by right shifting with factor of 5. In Thor onwards, this shift is not required is for VIC engine. Jira HOSTX-5905 Change-Id: I69980fdfcf50b15db99b1fbad522aecd571a0f17 Signed-off-by: Mainak Sen <msen@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3306825 Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
30 lines
624 B
C
30 lines
624 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2020 NVIDIA Corporation */
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#ifndef _TEGRA_DRM_UAPI_SUBMIT_H
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#define _TEGRA_DRM_UAPI_SUBMIT_H
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struct tegra_drm_used_mapping {
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struct tegra_drm_mapping *mapping;
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u32 flags;
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};
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struct tegra_drm_submit_data {
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struct tegra_drm_used_mapping *used_mappings;
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u32 num_used_mappings;
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u32 id;
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struct {
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struct device *dev;
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dma_addr_t iova;
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void *virt;
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u32 timestamp_shift;
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} timestamps;
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};
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int tegra_drm_fw_validate(struct tegra_drm_client *client, u32 *data, u32 start,
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u32 words, struct tegra_drm_submit_data *submit,
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u32 *job_class);
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#endif
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