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git://nv-tegra.nvidia.com/linux-nv-oot.git
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29ec18d2bc
Bug 5065840 Change-Id: I2012645108457974e24d3c8799ee9412393408e1 Signed-off-by: Arvind M <am@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3291589 Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Vishal Thoke <vthoke@nvidia.com> Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com> Reviewed-by: Ken Adams <kadams@nvidia.com>
96 lines
2.8 KiB
C
96 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-FileCopyrightText: Copyright (c) 2022-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* Device data for T194
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*/
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#ifndef __NVHOST_NVDLA_T194_H__
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#define __NVHOST_NVDLA_T194_H__
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#include "port/nvdla_host_wrapper.h"
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#include <linux/platform/tegra/emc_bwmgr.h>
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#include "nvdla.h"
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#include "nvdla_cg_regs.h"
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#include "dla_t19x_fw_version.h"
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static struct nvhost_device_data t19_nvdla0_info = {
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.devfs_name_family = "nvdla",
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.class = NV_DLA0_CLASS_ID,
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.clocks = {
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{"nafll_dla", UINT_MAX},
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{"nafll_dla_falcon", UINT_MAX},
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{"nvdla0", UINT_MAX},
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{"nvdla0_flcn", UINT_MAX},
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{"emc", 0,
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NVHOST_MODULE_ID_EXTERNAL_MEMORY_CONTROLLER,
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TEGRA_SET_EMC_FLOOR}
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},
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.resource_policy = RESOURCE_PER_CHANNEL_INSTANCE,
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.finalize_poweron = nvdla_finalize_poweron,
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.prepare_poweroff = nvdla_prepare_poweroff,
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.flcn_isr = nvdla_flcn_isr,
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.self_config_flcn_isr = true,
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.vm_regs = {{0x30, true}, {0x34, false} },
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.firmware_name = NV_DLA_TEGRA194_FW,
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.version = FIRMWARE_ENCODE_VERSION(T19X),
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.autosuspend_delay = 500,
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.keepalive = true,
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.poweron_reset = true,
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.serialize = true,
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.ctrl_ops = &tegra_nvdla_ctrl_ops,
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#if defined(NVDLA_HAVE_CONFIG_AXI) && (NVDLA_HAVE_CONFIG_AXI == 1)
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.get_reloc_phys_addr = NULL,
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#else
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.get_reloc_phys_addr = nvhost_t194_get_reloc_phys_addr,
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#endif
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.module_irq = 1,
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.engine_cg_regs = nvdla_gating_registers,
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.engine_can_cg = true,
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.can_powergate = true,
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.bwmgr_client_id = TEGRA_BWMGR_CLIENT_DLA0,
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.transcfg_addr = 0x0444,
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.transcfg_val = 0x20,
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.firmware_not_in_subdir = true,
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};
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static struct nvhost_device_data t19_nvdla1_info = {
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.devfs_name_family = "nvdla",
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.class = NV_DLA1_CLASS_ID,
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.clocks = {
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{"nvdla1", UINT_MAX},
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{"nvdla1_flcn", UINT_MAX},
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{"emc", 0,
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NVHOST_MODULE_ID_EXTERNAL_MEMORY_CONTROLLER,
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TEGRA_SET_EMC_FLOOR}
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},
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.resource_policy = RESOURCE_PER_CHANNEL_INSTANCE,
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.finalize_poweron = nvdla_finalize_poweron,
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.prepare_poweroff = nvdla_prepare_poweroff,
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.flcn_isr = nvdla_flcn_isr,
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.self_config_flcn_isr = true,
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.vm_regs = {{0x30, true}, {0x34, false} },
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.firmware_name = NV_DLA_TEGRA194_FW,
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.version = FIRMWARE_ENCODE_VERSION(T19X),
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.autosuspend_delay = 500,
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.keepalive = true,
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.poweron_reset = true,
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.serialize = true,
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.ctrl_ops = &tegra_nvdla_ctrl_ops,
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#if defined(NVDLA_HAVE_CONFIG_AXI) && (NVDLA_HAVE_CONFIG_AXI == 1)
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.get_reloc_phys_addr = NULL,
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#else
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.get_reloc_phys_addr = nvhost_t194_get_reloc_phys_addr,
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#endif
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.module_irq = 1,
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.engine_cg_regs = nvdla_gating_registers,
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.engine_can_cg = true,
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.can_powergate = true,
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.bwmgr_client_id = TEGRA_BWMGR_CLIENT_DLA1,
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.transcfg_addr = 0x0444,
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.transcfg_val = 0x20,
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.firmware_not_in_subdir = true,
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};
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#endif /* End of __NVHOST_NVDLA_T194_H__ */
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