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f535883c6a
The VIC and NVDEC drivers contain some duplicated code. Start chipping away at that by introducing a helper for programming the TRANSCFG and STREAMID registers. Bug 3778105 Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Change-Id: I30f9cf3fb8fb89fa5abf5f5e17ba41649a42097e Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2771766 (cherry picked from commit 27872b2f90d66d8706594f5903cff4d2b1e88be4) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2759058 Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com> Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
30 lines
664 B
C
30 lines
664 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015, NVIDIA Corporation.
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*/
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#ifndef TEGRA_VIC_H
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#define TEGRA_VIC_H
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/* VIC methods */
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#define VIC_SET_FCE_UCODE_SIZE 0x0000071C
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#define VIC_SET_FCE_UCODE_OFFSET 0x0000072C
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/* VIC registers */
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#define NV_PVIC_MISC_PRI_VIC_CG 0x000016d0
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#define CG_IDLE_CG_DLY_CNT(val) ((val & 0x3f) << 0)
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#define CG_IDLE_CG_EN (1 << 6)
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#define CG_WAKEUP_DLY_CNT(val) ((val & 0xf) << 16)
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#define VIC_TFBIF_TRANSCFG 0x00002044
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/* Firmware offsets */
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#define VIC_UCODE_FCE_HEADER_OFFSET (6*4)
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#define VIC_UCODE_FCE_DATA_OFFSET (7*4)
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#define FCE_UCODE_SIZE_OFFSET (2*4)
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#endif /* TEGRA_VIC_H */
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