mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-22 09:11:26 +03:00
5066fe1a3a
When using RBTREE cache, there can be allocations the first time a register is accessed. This can cause an attempt to schedule while atomic in the case that the regmap is using a spinlock. This can be resolved by using a flat cache. Bug 200041820 Change-Id: Id69592cd5fadbb5ad9ccfdbb1f184733a332512c Signed-off-by: Arun Shamanna Lakshmi <aruns@nvidia.com> Reviewed-on: http://git-master/r/552940
481 lines
13 KiB
C
481 lines
13 KiB
C
/*
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* tegra210_spdif_alt.c - Tegra210 SPDIF driver
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*
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* Copyright (c) 2014 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <linux/of_device.h>
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#include "tegra210_xbar_alt.h"
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#include "tegra210_spdif_alt.h"
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#define DRV_NAME "tegra210-spdif"
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static int tegra210_spdif_runtime_suspend(struct device *dev)
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{
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struct tegra210_spdif *spdif = dev_get_drvdata(dev);
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regcache_cache_only(spdif->regmap, true);
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clk_disable_unprepare(spdif->clk_spdif_out);
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clk_disable_unprepare(spdif->clk_spdif_in);
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return 0;
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}
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static int tegra210_spdif_runtime_resume(struct device *dev)
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{
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struct tegra210_spdif *spdif = dev_get_drvdata(dev);
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int ret = 0;
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ret = clk_prepare_enable(spdif->clk_spdif_out);
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if (ret) {
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dev_err(dev, "spdif_out_clk_enable failed: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(spdif->clk_spdif_in);
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if (ret) {
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dev_err(dev, "spdif_in_clk_enable failed: %d\n", ret);
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return ret;
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}
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regcache_cache_only(spdif->regmap, false);
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return ret;
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}
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static int tegra210_spdif_set_dai_sysclk(struct snd_soc_dai *dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct device *dev = dai->dev;
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struct tegra210_spdif *spdif = snd_soc_dai_get_drvdata(dai);
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int spdif_out_clock_rate, spdif_in_clock_rate;
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int ret;
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switch (freq) {
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case 32000:
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spdif_out_clock_rate = 4096000;
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spdif_in_clock_rate = 48000000;
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break;
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case 44100:
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spdif_out_clock_rate = 5644800;
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spdif_in_clock_rate = 48000000;
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break;
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case 48000:
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spdif_out_clock_rate = 6144000;
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spdif_in_clock_rate = 48000000;
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break;
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case 88200:
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spdif_out_clock_rate = 11289600;
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spdif_in_clock_rate = 72000000;
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break;
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case 96000:
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spdif_out_clock_rate = 12288000;
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spdif_in_clock_rate = 72000000;
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break;
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case 176400:
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spdif_out_clock_rate = 22579200;
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spdif_in_clock_rate = 108000000;
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break;
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case 192000:
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spdif_out_clock_rate = 24576000;
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spdif_in_clock_rate = 108000000;
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break;
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default:
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return -EINVAL;
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}
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if (dir == SND_SOC_CLOCK_OUT) {
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ret = clk_set_rate(spdif->clk_spdif_out, spdif_out_clock_rate);
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if (ret) {
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dev_err(dev, "Can't set SPDIF Out clock rate: %d\n",
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ret);
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return ret;
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}
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} else {
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ret = clk_set_rate(spdif->clk_spdif_in, spdif_in_clock_rate);
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if (ret) {
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dev_err(dev, "Can't set SPDIF In clock rate: %d\n",
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ret);
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return ret;
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}
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}
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return 0;
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}
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static int tegra210_spdif_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct device *dev = dai->dev;
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struct tegra210_spdif *spdif = snd_soc_dai_get_drvdata(dai);
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int channels, audio_bits, bit_mode;
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struct tegra210_xbar_cif_conf cif_conf;
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channels = params_channels(params);
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if (channels < 2) {
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dev_err(dev, "Doesn't support %d channels\n", channels);
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return -EINVAL;
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}
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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audio_bits = TEGRA210_AUDIOCIF_BITS_16;
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bit_mode = TEGRA210_SPDIF_BIT_MODE16;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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audio_bits = TEGRA210_AUDIOCIF_BITS_32;
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bit_mode = TEGRA210_SPDIF_BIT_MODERAW;
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break;
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default:
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return -EINVAL;
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}
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memset(&cif_conf, 0, sizeof(cif_conf));
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cif_conf.audio_channels = channels;
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cif_conf.client_channels = channels;
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cif_conf.audio_bits = audio_bits;
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cif_conf.client_bits = audio_bits;
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regmap_update_bits(spdif->regmap, TEGRA210_SPDIF_CTRL,
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TEGRA210_SPDIF_CTRL_BIT_MODE_MASK,
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bit_mode);
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/* As a CODEC DAI, CAPTURE is transmit */
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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spdif->soc_data->set_audio_cif(spdif->regmap,
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TEGRA210_SPDIF_CIF_TXD_CTRL,
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&cif_conf);
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} else {
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spdif->soc_data->set_audio_cif(spdif->regmap,
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TEGRA210_SPDIF_CIF_RXD_CTRL,
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&cif_conf);
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}
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return 0;
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}
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static int tegra210_spdif_codec_probe(struct snd_soc_codec *codec)
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{
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struct tegra210_spdif *spdif = snd_soc_codec_get_drvdata(codec);
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int ret;
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codec->control_data = spdif->regmap;
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ret = snd_soc_codec_set_cache_io(codec, 32, 32, SND_SOC_REGMAP);
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if (ret != 0) {
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dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static struct snd_soc_dai_ops tegra210_spdif_dai_ops = {
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.hw_params = tegra210_spdif_hw_params,
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.set_sysclk = tegra210_spdif_set_dai_sysclk,
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};
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static struct snd_soc_dai_driver tegra210_spdif_dais[] = {
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{
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.name = "CIF",
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.playback = {
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.stream_name = "CIF Receive",
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.channels_min = 1,
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.channels_max = 16,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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},
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.capture = {
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.stream_name = "CIF Transmit",
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.channels_min = 1,
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.channels_max = 16,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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},
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},
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{
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.name = "DAP",
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.playback = {
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.stream_name = "DAP Receive",
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.channels_min = 1,
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.channels_max = 16,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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},
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.capture = {
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.stream_name = "DAP Transmit",
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.channels_min = 1,
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.channels_max = 16,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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},
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.ops = &tegra210_spdif_dai_ops,
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}
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};
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static const struct snd_soc_dapm_widget tegra210_spdif_widgets[] = {
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SND_SOC_DAPM_AIF_IN("CIF RX", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("CIF TX", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("DAP RX", NULL, 0, TEGRA210_SPDIF_CTRL, 29, 0),
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SND_SOC_DAPM_AIF_OUT("DAP TX", NULL, 0, TEGRA210_SPDIF_CTRL, 28, 0),
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};
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static const struct snd_soc_dapm_route tegra210_spdif_routes[] = {
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{ "CIF RX", NULL, "CIF Receive"},
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{ "DAP TX", NULL, "CIF RX"},
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{ "DAP Transmit", NULL, "DAP TX"},
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{ "DAP RX", NULL, "DAP Receive"},
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{ "CIF TX", NULL, "DAP RX"},
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{ "CIF Transmit", NULL, "CIF TX"},
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};
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static struct snd_soc_codec_driver tegra210_spdif_codec = {
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.probe = tegra210_spdif_codec_probe,
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.dapm_widgets = tegra210_spdif_widgets,
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.num_dapm_widgets = ARRAY_SIZE(tegra210_spdif_widgets),
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.dapm_routes = tegra210_spdif_routes,
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.num_dapm_routes = ARRAY_SIZE(tegra210_spdif_routes),
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};
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static bool tegra210_spdif_wr_rd_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case TEGRA210_SPDIF_CTRL:
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case TEGRA210_SPDIF_STROBE_CTRL:
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case TEGRA210_SPDIF_CIF_TXD_CTRL:
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case TEGRA210_SPDIF_CIF_RXD_CTRL:
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case TEGRA210_SPDIF_CIF_TXU_CTRL:
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case TEGRA210_SPDIF_CIF_RXU_CTRL:
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case TEGRA210_SPDIF_CH_STA_RX_A:
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case TEGRA210_SPDIF_CH_STA_RX_B:
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case TEGRA210_SPDIF_CH_STA_RX_C:
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case TEGRA210_SPDIF_CH_STA_RX_D:
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case TEGRA210_SPDIF_CH_STA_RX_E:
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case TEGRA210_SPDIF_CH_STA_RX_F:
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case TEGRA210_SPDIF_CH_STA_TX_A:
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case TEGRA210_SPDIF_CH_STA_TX_B:
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case TEGRA210_SPDIF_CH_STA_TX_C:
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case TEGRA210_SPDIF_CH_STA_TX_D:
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case TEGRA210_SPDIF_CH_STA_TX_E:
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case TEGRA210_SPDIF_CH_STA_TX_F:
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case TEGRA210_SPDIF_FLOWCTL_CTRL:
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case TEGRA210_SPDIF_TX_STEP:
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case TEGRA210_SPDIF_FLOW_STATUS:
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case TEGRA210_SPDIF_FLOW_TOTAL:
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case TEGRA210_SPDIF_FLOW_OVER:
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case TEGRA210_SPDIF_FLOW_UNDER:
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case TEGRA210_SPDIF_LCOEF_1_4_0:
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case TEGRA210_SPDIF_LCOEF_1_4_1:
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case TEGRA210_SPDIF_LCOEF_1_4_2:
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case TEGRA210_SPDIF_LCOEF_1_4_3:
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case TEGRA210_SPDIF_LCOEF_1_4_4:
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case TEGRA210_SPDIF_LCOEF_1_4_5:
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case TEGRA210_SPDIF_LCOEF_2_4_0:
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case TEGRA210_SPDIF_LCOEF_2_4_1:
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case TEGRA210_SPDIF_LCOEF_2_4_2:
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return true;
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default:
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return false;
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};
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}
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static const struct regmap_config tegra210_spdif_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = TEGRA210_SPDIF_LCOEF_2_4_2,
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.writeable_reg = tegra210_spdif_wr_rd_reg,
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.readable_reg = tegra210_spdif_wr_rd_reg,
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.cache_type = REGCACHE_FLAT,
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};
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static const struct tegra210_spdif_soc_data soc_data_tegra210 = {
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.set_audio_cif = tegra210_xbar_set_cif,
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};
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static const struct of_device_id tegra210_spdif_of_match[] = {
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{ .compatible = "nvidia,tegra210-spdif", .data = &soc_data_tegra210 },
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{},
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};
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static int tegra210_spdif_platform_probe(struct platform_device *pdev)
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{
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struct tegra210_spdif *spdif;
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struct resource *mem, *memregion;
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void __iomem *regs;
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const struct of_device_id *match;
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struct tegra210_spdif_soc_data *soc_data;
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int ret;
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match = of_match_device(tegra210_spdif_of_match, &pdev->dev);
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if (!match) {
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dev_err(&pdev->dev, "Error: No device match found\n");
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ret = -ENODEV;
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goto err;
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}
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soc_data = (struct tegra210_spdif_soc_data *)match->data;
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spdif = devm_kzalloc(&pdev->dev, sizeof(struct tegra210_spdif),
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GFP_KERNEL);
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if (!spdif) {
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dev_err(&pdev->dev, "Can't allocate tegra210_spdif\n");
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ret = -ENOMEM;
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goto err;
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}
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dev_set_drvdata(&pdev->dev, spdif);
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spdif->soc_data = soc_data;
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spdif->clk_spdif_out = devm_clk_get(&pdev->dev, "spdif_out");
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if (IS_ERR(spdif->clk_spdif_out)) {
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dev_err(&pdev->dev, "Can't retrieve spdif clock\n");
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ret = PTR_ERR(spdif->clk_spdif_out);
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goto err;
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}
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spdif->clk_spdif_in = devm_clk_get(&pdev->dev, "spdif_in");
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if (IS_ERR(spdif->clk_spdif_in)) {
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dev_err(&pdev->dev, "Can't retrieve spdif clock\n");
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ret = PTR_ERR(spdif->clk_spdif_in);
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goto err_spdif_out_clk_put;
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}
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem) {
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dev_err(&pdev->dev, "No memory resource\n");
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ret = -ENODEV;
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goto err_spdif_in_clk_put;
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}
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memregion = devm_request_mem_region(&pdev->dev, mem->start,
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resource_size(mem), DRV_NAME);
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if (!memregion) {
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dev_err(&pdev->dev, "Memory region already claimed\n");
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ret = -EBUSY;
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goto err_spdif_in_clk_put;
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}
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regs = devm_ioremap(&pdev->dev, mem->start, resource_size(mem));
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if (!regs) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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goto err_spdif_in_clk_put;
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}
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spdif->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
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&tegra210_spdif_regmap_config);
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if (IS_ERR(spdif->regmap)) {
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dev_err(&pdev->dev, "regmap init failed\n");
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ret = PTR_ERR(spdif->regmap);
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goto err_spdif_in_clk_put;
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}
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regcache_cache_only(spdif->regmap, true);
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if (of_property_read_u32(pdev->dev.of_node,
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"nvidia,ahub-spdif-id",
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&pdev->dev.id) < 0) {
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dev_err(&pdev->dev,
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"Missing property nvidia,ahub-spdif-id\n");
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ret = -ENODEV;
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goto err_spdif_in_clk_put;
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}
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pm_runtime_enable(&pdev->dev);
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if (!pm_runtime_enabled(&pdev->dev)) {
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ret = tegra210_spdif_runtime_resume(&pdev->dev);
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if (ret)
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goto err_pm_disable;
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}
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ret = snd_soc_register_codec(&pdev->dev, &tegra210_spdif_codec,
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tegra210_spdif_dais,
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ARRAY_SIZE(tegra210_spdif_dais));
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if (ret != 0) {
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dev_err(&pdev->dev, "Could not register CODEC: %d\n", ret);
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goto err_suspend;
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}
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return 0;
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err_suspend:
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if (!pm_runtime_status_suspended(&pdev->dev))
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tegra210_spdif_runtime_suspend(&pdev->dev);
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err_pm_disable:
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pm_runtime_disable(&pdev->dev);
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err_spdif_in_clk_put:
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devm_clk_put(&pdev->dev, spdif->clk_spdif_in);
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err_spdif_out_clk_put:
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devm_clk_put(&pdev->dev, spdif->clk_spdif_out);
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err:
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return ret;
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}
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static int tegra210_spdif_platform_remove(struct platform_device *pdev)
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{
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struct tegra210_spdif *spdif = dev_get_drvdata(&pdev->dev);
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snd_soc_unregister_codec(&pdev->dev);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
if (!pm_runtime_status_suspended(&pdev->dev))
|
|
tegra210_spdif_runtime_suspend(&pdev->dev);
|
|
|
|
devm_clk_put(&pdev->dev, spdif->clk_spdif_out);
|
|
devm_clk_put(&pdev->dev, spdif->clk_spdif_in);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops tegra210_spdif_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(tegra210_spdif_runtime_suspend,
|
|
tegra210_spdif_runtime_resume, NULL)
|
|
};
|
|
|
|
static struct platform_driver tegra210_spdif_driver = {
|
|
.driver = {
|
|
.name = DRV_NAME,
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = tegra210_spdif_of_match,
|
|
.pm = &tegra210_spdif_pm_ops,
|
|
},
|
|
.probe = tegra210_spdif_platform_probe,
|
|
.remove = tegra210_spdif_platform_remove,
|
|
};
|
|
module_platform_driver(tegra210_spdif_driver);
|
|
|
|
MODULE_AUTHOR("Arun Shamanna Lakshmi <aruns@nvidia.com>");
|
|
MODULE_AUTHOR("Songhee Baek <sbaek@nvidia.com>");
|
|
MODULE_DESCRIPTION("Tegra210 SPDIF ASoC driver");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:" DRV_NAME);
|
|
MODULE_DEVICE_TABLE(of, tegra210_spdif_of_match);
|