mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
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This is the output of the automated scripts created to parse the dtb and dts files congruently Jira ESDP-27666 Change-Id: Ic82a3f813bcbe6e78ba5f9b68875293c5d4bc6d7 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3274878 Tested-by: Mark Mendez <mmendez@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
204 lines
6.9 KiB
YAML
204 lines
6.9 KiB
YAML
# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms and conditions of the GNU General Public License,
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# version 2, as published by the Free Software Foundation.
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#
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# This program is distributed in the hope it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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# more details.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controller@8108020000/nvidia,tegra264-mc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: FIXME -- add title
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maintainers:
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- FIXME -- add maintainers
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description: |
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the compatability = nvidia,tegra264-mc is mentioned in the following drivers
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- <TOP>/kernel/nvidia-oot/drivers/platform/tegra/mc-utils/mc-utils.c
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The following nodes use this compatibility
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- /bus@0/memory-controller@8108020000
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select:
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properties:
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compatible:
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minItems: 2
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maxItems: 2
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items:
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enum:
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- nvidia,tegra264-mc
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- nvidia,tegra234-mc
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required:
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- compatible
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properties:
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reg:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Registers are given by a tuple of two values:
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- register address:
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- register block size.
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items:
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minItems: 4
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maxItems: 4
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x81
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maximum: 0x81
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x8020000
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maximum: 0x8220000
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x20000
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maximum: 0x20000
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reg-names:
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$ref: "/schemas/types.yaml#/definitions/string-array"
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items:
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enum:
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- broadcast
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- ch0
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- ch1
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- ch2
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- ch3
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- ch4
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- ch5
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- ch6
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- ch7
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- ch8
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- ch9
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- ch10
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- ch11
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- ch12
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- ch13
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- ch14
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- ch15
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interrupts:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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description: |
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Interrupts are give by a tuple of 3 values:
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- interrupt specifier (GIC_SPI = 0, GIC_PPI = 1)
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definitions in dt-bindings/interrupt-controller/arm-gic.h
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- interrupt number
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- trigger type (rising edge, falling edge, both, etc)
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definitions in dt-bindings/interrupt-controller/irq.h
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items:
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x8b
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maximum: 0x387
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x4
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maximum: 0x4
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'#interconnect-cells':
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x1
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maximum: 0x1
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'#address-cells':
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x2
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maximum: 0x2
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'#size-cells':
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x2
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maximum: 0x2
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dma-ranges:
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$ref: "/schemas/types.yaml#/definitions/uint32-matrix"
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items:
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minItems: 6
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maxItems: 6
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items:
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x100
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maximum: 0x100
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- $ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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numa-node-id:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0x0
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maximum: 0x0
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required:
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- compatible
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- reg
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- interrupts
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examples:
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- |
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memory-controller@8108020000 {
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compatible = "nvidia,tegra264-mc",
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"nvidia,tegra234-mc";
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status = "disabled";
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reg = <0x81 0x08020000 0x0 0x20000>,
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<0x81 0x08040000 0x0 0x20000>,
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<0x81 0x08060000 0x0 0x20000>,
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<0x81 0x08080000 0x0 0x20000>,
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<0x81 0x080a0000 0x0 0x20000>,
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<0x81 0x080c0000 0x0 0x20000>,
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<0x81 0x080e0000 0x0 0x20000>,
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<0x81 0x08100000 0x0 0x20000>,
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<0x81 0x08120000 0x0 0x20000>,
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<0x81 0x08140000 0x0 0x20000>,
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<0x81 0x08160000 0x0 0x20000>,
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<0x81 0x08180000 0x0 0x20000>,
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<0x81 0x081a0000 0x0 0x20000>,
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<0x81 0x081c0000 0x0 0x20000>,
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<0x81 0x081e0000 0x0 0x20000>,
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<0x81 0x08200000 0x0 0x20000>,
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<0x81 0x08220000 0x0 0x20000>;
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reg-names = "broadcast, ch0, ch1, ch2, ch3",
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"ch4, ch5, ch6, ch7, ch8, ch9, ch10",
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"ch11, ch12, ch13, ch14, ch15";
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interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 903 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
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#interconnect-cells = <1>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x81 0x08020000 0x81 0x08020000 0x0 0x20000>,
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<0x81 0x08040000 0x81 0x08040000 0x0 0x20000>,
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<0x81 0x080c0000 0x81 0x080c0000 0x0 0x20000>;
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dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
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numa-node-id = <0x0>;
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};
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