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Because of the way in which Makefile is defined for the drivers, each driver file is getting compliled as separate *.ko module. This results in loading of all the *.ko modules for maintaining the functionality. Current patch re-organises makefile and thus terga-alt structure, - utils/ : will provide all the helper functions, - machine_drivers/ : lists all the machine specific drivers we have, - tegra-alt/*.c : ahub module drivers, each would have a separate driver module, - include/ : all the local header files needed for driver modules Bug 200346429 Change-Id: Ic659879a0d6e8ef48b0d79b81059fba4c069591e Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1559745 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
111 lines
3.2 KiB
C
111 lines
3.2 KiB
C
/*
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* tegra_alt_asoc_utils.h - Definitions for MCLK and DAP Utility driver
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*
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* Author: Stephen Warren <swarren@nvidia.com>
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* Copyright (c) 2011-2017 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __TEGRA_ASOC_UTILS_ALT_H_
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#define __TEGRA_ASOC_UTILS_ALT_H_
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#ifdef CONFIG_SWITCH
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#include <linux/switch.h>
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#endif
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struct clk;
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struct device;
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enum tegra_asoc_utils_soc {
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TEGRA_ASOC_UTILS_SOC_TEGRA210,
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TEGRA_ASOC_UTILS_SOC_TEGRA186,
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};
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/* Maintain same order in DT entry */
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enum tegra_asoc_utils_clkrate {
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PLLA_x11025_RATE,
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AUD_MCLK_x11025_RATE,
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PLLA_OUT0_x11025_RATE,
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AHUB_x11025_RATE,
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PLLA_x8000_RATE,
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AUD_MCLK_x8000_RATE,
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PLLA_OUT0_x8000_RATE,
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AHUB_x8000_RATE,
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MAX_NUM_RATES,
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};
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/* These values are copied from WiredAccessoryObserver */
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enum headset_state {
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BIT_NO_HEADSET = 0,
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BIT_HEADSET = (1 << 0),
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BIT_HEADSET_NO_MIC = (1 << 1),
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};
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struct tegra_asoc_audio_clock_info {
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struct device *dev;
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struct snd_soc_card *card;
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enum tegra_asoc_utils_soc soc;
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struct clk *clk_pll_a;
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struct clk *clk_pll_a_out0;
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struct clk *clk_cdev1;
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struct clk *clk_ahub;
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struct reset_control *clk_cdev1_rst;
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int clk_cdev1_state;
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struct clk *clk_m;
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struct clk *clk_pll_p_out1;
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int set_mclk;
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int lock_count;
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int set_baseclock;
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int set_clk_out_rate;
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int num_clk;
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unsigned int clk_out_rate;
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unsigned int mclk_scale;
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u32 clk_rates[MAX_NUM_RATES];
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};
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struct clk *tegra_alt_asoc_utils_get_clk(struct device *dev,
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bool dev_id,
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const char *clk_name);
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void tegra_alt_asoc_utils_clk_put(struct device *dev, struct clk *clk);
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int tegra_alt_asoc_utils_set_rate(struct tegra_asoc_audio_clock_info *data,
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int srate,
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int mclk,
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int clk_out_rate);
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void tegra_alt_asoc_utils_lock_clk_rate(
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struct tegra_asoc_audio_clock_info *data,
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int lock);
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int tegra_alt_asoc_utils_init(struct tegra_asoc_audio_clock_info *data,
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struct device *dev, struct snd_soc_card *card);
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void tegra_alt_asoc_utils_fini(struct tegra_asoc_audio_clock_info *data);
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int tegra_alt_asoc_utils_set_extern_parent(
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struct tegra_asoc_audio_clock_info *data, const char *parent);
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int tegra_alt_asoc_utils_set_parent(struct tegra_asoc_audio_clock_info *data,
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int is_i2s_master);
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int tegra_alt_asoc_utils_clk_enable(struct tegra_asoc_audio_clock_info *data);
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int tegra_alt_asoc_utils_clk_disable(struct tegra_asoc_audio_clock_info *data);
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int tegra_alt_asoc_utils_register_ctls(struct tegra_asoc_audio_clock_info *data);
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int tegra_alt_asoc_utils_tristate_dap(int id, bool tristate);
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#ifdef CONFIG_SWITCH
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int tegra_alt_asoc_switch_register(struct switch_dev *sdev);
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void tegra_alt_asoc_switch_unregister(struct switch_dev *sdev);
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#endif
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#endif
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