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4241a7c976
As long as the subcomponents in the engine are active, we consider the engine as active and the engine should export active signal to the actmon. Bug 4179140 Signed-off-by: Johnny Liu <johnliu@nvidia.com> Change-Id: Ic4cccf29e8ac87da24f6fe3bf1f1e93a11511762 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2930445 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2023, NVIDIA Corporation. All rights reserved.
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*/
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#ifndef TEGRA_VIC_H
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#define TEGRA_VIC_H
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/* VIC methods */
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#define VIC_SET_FCE_UCODE_SIZE 0x0000071C
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#define VIC_SET_FCE_UCODE_OFFSET 0x0000072C
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/* VIC registers */
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#define NV_PVIC_MISC_PRI_VIC_CG 0x000016d0
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#define CG_IDLE_CG_DLY_CNT(val) ((val & 0x3f) << 0)
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#define CG_IDLE_CG_EN (1 << 6)
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#define CG_WAKEUP_DLY_CNT(val) ((val & 0xf) << 16)
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#define NV_PVIC_TFBIF_ACTMON_ACTIVE_MASK 0x0000204c
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#define NV_PVIC_TFBIF_ACTMON_ACTIVE_BORPS 0x00002050
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#define NV_PVIC_TFBIF_ACTMON_ACTIVE_WEIGHT 0x00002054
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#define VIC_TFBIF_ACTMON_ACTIVE_MASK_STARVED BIT(0)
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#define VIC_TFBIF_ACTMON_ACTIVE_MASK_STALLED BIT(1)
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#define VIC_TFBIF_ACTMON_ACTIVE_MASK_DELAYED BIT(2)
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#define VIC_TFBIF_ACTMON_ACTIVE_BORPS_ACTIVE BIT(7)
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#define VIC_TFBIF_TRANSCFG 0x00002044
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/* Firmware offsets */
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#define VIC_UCODE_FCE_HEADER_OFFSET (6*4)
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#define VIC_UCODE_FCE_DATA_OFFSET (7*4)
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#define FCE_UCODE_SIZE_OFFSET (2*4)
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/*
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* VIC AXI read bus is 256-bits width
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* VIC AXI write bus is 256-bits width
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*/
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#define VIC_AXI_RW_BANDWIDTH 512
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#endif /* TEGRA_VIC_H */
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