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97f5252632
Update code to account for t26x channel and descriptor limits. Also, the reserved descriptors for all generations of PVA HW are at indices 60-63. Update KMD checks to ensure the reserved descriptors are never patched, and are not linked to either during SW sequencing or HW sequencing. Jira PVAAS-13055 Change-Id: I276490d51d65648a406fabed06c47e45d9e6978a Signed-off-by: abhinayaa <abhinayaa@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2908053 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2999158 Reviewed-by: Amruta Sai Anusha Bhamidipati <abhamidipati@nvidia.com> Reviewed-by: Omar Nemri <onemri@nvidia.com> Tested-by: Omar Nemri <onemri@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>