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When Root port applies secondary bus reset(SBR) or link disable, EP_RESET interrupt is received at Endpoint. On EP_RESET poll for detect reset LTSSM state which confirms that SBR reset released or link disable is cleared. After polling perform Endpoint controller cold reset. Due to HW bug 4777981, C2 x2/x1 LTSSM state doesn't move to detect reset when SBR reset is released, instead it stays in hot reset state. In this case perform Endpoint controller cold reset after poll timeout. PCIe link still comes up in this case. Bug 4777981 Bug 4785875 Change-Id: I89402aa7c963082510170b88a1f7a4ec481162be Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3197116 Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com>