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27f17e56d1
Using this patch we are pulling in the missing changes from kernel/nvidia directory. JIRA ESLC-6885 Signed-off-by: Manish Bhardwaj <mbhardwaj@nvidia.com> Change-Id: I9376e14971be0f4d40f759858fcc9db90a7b9d72 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2785534 Reviewed-by: Suresh Venkatachalam <skathirampat@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
142 lines
3.7 KiB
C
142 lines
3.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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#ifndef __TEGRA_HV_VSE_H
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#define __TEGRA_HV_VSE_H
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struct tegra_vse_soc_info {
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bool cmac_hw_padding_supported;
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bool gcm_decrypt_supported;
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};
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/* GCM Operation Supported Flag */
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enum tegra_gcm_dec_supported {
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GCM_DEC_OP_NOT_SUPPORTED,
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GCM_DEC_OP_SUPPORTED,
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};
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struct crypto_dev_to_ivc_map {
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uint32_t ivc_id;
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uint32_t se_engine;
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uint32_t node_id;
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uint32_t priority;
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uint32_t channel_grp_id;
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enum tegra_gcm_dec_supported gcm_dec_supported;
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struct tegra_hv_ivc_cookie *ivck;
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struct completion tegra_vse_complete;
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struct task_struct *tegra_vse_task;
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bool vse_thread_start;
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struct mutex se_ivc_lock;
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};
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struct tegra_virtual_se_dev {
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struct device *dev;
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/* Engine id */
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unsigned int engine_id;
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/* Engine suspend state */
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atomic_t se_suspended;
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struct tegra_vse_soc_info *chipdata;
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#if defined(CONFIG_HW_RANDOM)
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/* Integration with hwrng framework */
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struct hwrng *hwrng;
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#endif /* CONFIG_HW_RANDOM */
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struct platform_device *host1x_pdev;
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struct crypto_dev_to_ivc_map *crypto_to_ivc_map;
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};
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/* Security Engine random number generator context */
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struct tegra_virtual_se_rng_context {
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/* Security Engine device */
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struct tegra_virtual_se_dev *se_dev;
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/* RNG buffer pointer */
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u32 *rng_buf;
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/* RNG buffer dma address */
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dma_addr_t rng_buf_adr;
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/*Crypto dev instance*/
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uint32_t node_id;
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};
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/* Security Engine AES context */
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struct tegra_virtual_se_aes_context {
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/* Security Engine device */
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struct tegra_virtual_se_dev *se_dev;
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struct skcipher_request *req;
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/* Security Engine key slot */
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u32 aes_keyslot;
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/* key length in bytes */
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u32 keylen;
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/* AES operation mode */
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u32 op_mode;
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/* Is key slot */
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bool is_key_slot_allocated;
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/* size of GCM tag*/
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u32 authsize;
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/*Crypto dev instance*/
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uint32_t node_id;
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};
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/* Security Engine AES CMAC context */
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struct tegra_virtual_se_aes_cmac_context {
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unsigned int digest_size;
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u8 *hash_result; /* Intermediate hash result */
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dma_addr_t hash_result_addr; /* Intermediate hash result dma addr */
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bool is_first; /* Represents first block */
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bool req_context_initialized; /* Mark initialization status */
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u32 aes_keyslot;
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/* key length in bits */
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u32 keylen;
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bool is_key_slot_allocated;
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/*Crypto dev instance*/
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uint32_t node_id;
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};
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/* Security Engine AES GMAC context */
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struct tegra_virtual_se_aes_gmac_context {
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/* size of GCM tag*/
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u32 authsize;
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/* Mark initialization status */
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bool req_context_initialized;
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u32 aes_keyslot;
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/* key length in bits */
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u32 keylen;
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bool is_key_slot_allocated;
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/*Crypto dev instance*/
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uint32_t node_id;
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};
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/* Security Engine SHA context */
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struct tegra_virtual_se_sha_context {
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/* Security Engine device */
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struct tegra_virtual_se_dev *se_dev;
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/* SHA operation mode */
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u32 op_mode;
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unsigned int digest_size;
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u8 mode;
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/*Crypto dev instance*/
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uint32_t node_id;
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};
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/* Security Engine request context */
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struct tegra_virtual_se_req_context {
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/* Security Engine device */
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struct tegra_virtual_se_dev *se_dev;
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unsigned int digest_size;
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unsigned int intermediate_digest_size;
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u8 mode; /* SHA operation mode */
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u8 *sha_buf; /* Buffer to store residual data */
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dma_addr_t sha_buf_addr; /* DMA address to residual data */
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u8 *hash_result; /* Intermediate hash result */
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dma_addr_t hash_result_addr; /* Intermediate hash result dma addr */
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u64 total_count; /* Total bytes in all the requests */
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u32 residual_bytes; /* Residual byte count */
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u32 blk_size; /* SHA block size */
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bool is_first; /* Represents first block */
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bool req_context_initialized; /* Mark initialization status */
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bool force_align; /* Enforce buffer alignment */
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/*Crypto dev instance*/
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uint32_t node_id;
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};
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#endif /*__TEGRA_HV_VSE_H*/
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