mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-22 17:25:35 +03:00
4a9d0efd2c
The legacy tegra IVC driver is used only in AON driver. Rest of client are already moved to the IVC drier from core kernel. Move the driver to AON folder and limit the usage of driver to AON driver only. Bug 4430467 Change-Id: Id0e9aeaf3415d33812556b82bfb0adc4941b2f41 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3039674 GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
476 lines
13 KiB
C
476 lines
13 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2014-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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#ifndef __TEGRA_IVC_H
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#define __TEGRA_IVC_H
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#include <linux/err.h>
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#include <linux/types.h>
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struct device_node;
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/* in kernel interfaces */
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struct tegra_hv_ivc_ops;
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struct tegra_hv_ivc_cookie {
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/* some fields that might be useful */
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uint32_t irq;
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int peer_vmid;
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int nframes;
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int frame_size;
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uint32_t *notify_va; /* address used to notify end-point */
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};
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struct tegra_hv_ivc_ops {
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/* called when data are received */
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void (*rx_rdy)(struct tegra_hv_ivc_cookie *ivck);
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/* called when space is available to write data */
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void (*tx_rdy)(struct tegra_hv_ivc_cookie *ivck);
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};
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struct ivc;
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struct tegra_hv_ivm_cookie {
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uint64_t ipa;
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uint64_t size;
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unsigned peer_vmid;
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void *reserved;
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};
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/* FIXME: overrides to avoid conflict with upstreamed ivc APIs */
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#define tegra_ivc_can_read nv_tegra_ivc_can_read
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#define tegra_ivc_can_write nv_tegra_ivc_can_write
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#define tegra_ivc_tx_empty nv_tegra_ivc_tx_empty
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#define tegra_ivc_tx_frames_available nv_tegra_ivc_tx_frames_available
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#define tegra_ivc_read nv_tegra_ivc_read
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#define tegra_ivc_read_peek nv_tegra_ivc_read_peek
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#define tegra_ivc_read_get_next_frame nv_tegra_ivc_read_get_next_frame
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#define tegra_ivc_read_advance nv_tegra_ivc_read_advance
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#define tegra_ivc_write nv_tegra_ivc_write
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#define tegra_ivc_write_poke nv_tegra_ivc_write_poke
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#define tegra_ivc_write_get_next_frame nv_tegra_ivc_write_get_next_frame
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#define tegra_ivc_write_advance nv_tegra_ivc_write_advance
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#define tegra_ivc_channel_reset nv_tegra_ivc_channel_reset
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#define tegra_ivc_channel_notified nv_tegra_ivc_channel_notified
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int tegra_ivc_write(struct ivc *ivc, const void *buf, size_t size);
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int tegra_ivc_read(struct ivc *ivc, void *buf, size_t size);
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int tegra_ivc_can_read(struct ivc *ivc);
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int tegra_ivc_can_write(struct ivc *ivc);
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uint32_t tegra_ivc_tx_frames_available(struct ivc *ivc);
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int tegra_ivc_tx_empty(struct ivc *ivc);
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int tegra_ivc_read_peek(struct ivc *ivc, void *buf, size_t off, size_t count);
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void *tegra_ivc_read_get_next_frame(struct ivc *ivc);
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int tegra_ivc_read_advance(struct ivc *ivc);
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int tegra_ivc_write_poke(struct ivc *ivc, const void *buf, size_t off,
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size_t count);
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void *tegra_ivc_write_get_next_frame(struct ivc *ivc);
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int tegra_ivc_write_advance(struct ivc *ivc);
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int tegra_ivc_channel_notified(struct ivc *ivc);
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void tegra_ivc_channel_reset(struct ivc *ivc);
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#ifdef CONFIG_TEGRA_HV_MANAGER
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/**
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* tegra_hv_ivc_reserve - Reserve an IVC queue for use
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* @dn: Device node pointer to the queue in the DT
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* If NULL, then operate on first HV device
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* @queue_id Id number of the queue to use.
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* @ops Ops structure or NULL (deprecated)
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*
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* Reserves the queue for use
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*
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* Returns a pointer to the ivc_dev to use or an ERR_PTR.
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* Note that returning EPROBE_DEFER means that the ivc driver
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* hasn't loaded yet and you should try again later in the
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* boot sequence.
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*
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* Note that @ops must be NULL for channels that handle reset.
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*/
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struct tegra_hv_ivc_cookie *tegra_hv_ivc_reserve(
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struct device_node *dn, uint32_t id,
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const struct tegra_hv_ivc_ops *ops);
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/**
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* tegra_hv_ivc_unreserve - Unreserve an IVC queue used
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* @ivck IVC cookie
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*
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* Unreserves the IVC channel
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*
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* Returns 0 on success and an error code otherwise
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*/
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int tegra_hv_ivc_unreserve(struct tegra_hv_ivc_cookie *ivck);
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/**
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* ivc_hv_ivc_write - Writes a frame to the IVC queue
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* @ivck IVC cookie of the queue
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* @buf Pointer to the data to write
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* @size Size of the data to write
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*
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* Write a number of bytes (as a single frame) from the queue.
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*
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* Returns size on success and an error code otherwise
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*/
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int tegra_hv_ivc_write(struct tegra_hv_ivc_cookie *ivck, const void *buf,
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size_t size);
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/**
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* ivc_hv_ivc_write_user - Writes a frame to the IVC queue
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* @ivck IVC cookie of the queue
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* @buf Pointer to the userspace data to write
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* @size Size of the data to write
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*
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* Write a number of bytes (as a single frame) from the queue.
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*
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* Returns size on success and an error code otherwise
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*/
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int tegra_hv_ivc_write_user(struct tegra_hv_ivc_cookie *ivck, const void __user *buf,
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size_t size);
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/**
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* ivc_hv_ivc_read - Reads a frame from the IVC queue
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* @ivck IVC cookie of the queue
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* @buf Pointer to the data to read
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* @size max size of the data to read
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*
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* Reads a number of bytes (as a single frame) from the queue.
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*
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* Returns size on success and an error code otherwise
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*/
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int tegra_hv_ivc_read(struct tegra_hv_ivc_cookie *ivck, void *buf, size_t size);
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/**
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* ivc_hv_ivc_read_user - Reads a frame from the IVC queue
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* @ivck IVC cookie of the queue
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* @buf Pointer to the userspace data to read
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* @size max size of the data to read
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*
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* Reads a number of bytes (as a single frame) from the queue.
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*
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* Returns size on success and an error code otherwise
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*/
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int tegra_hv_ivc_read_user(struct tegra_hv_ivc_cookie *ivck, void __user *buf, size_t size);
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/**
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* ivc_hv_ivc_can_read - Test whether data are available
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* @ivck IVC cookie of the queue
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*
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* Test wheter data to read are available
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*
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* Returns 1 if data are available in the rx queue, 0 if not
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*/
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int tegra_hv_ivc_can_read(struct tegra_hv_ivc_cookie *ivck);
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/**
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* ivc_hv_ivc_can_write - Test whether data can be written
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* @ivck IVC cookie of the queue
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*
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* Test wheter data can be written
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*
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* Returns 1 if data are can be written to the tx queue, 0 if not
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*/
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int tegra_hv_ivc_can_write(struct tegra_hv_ivc_cookie *ivck);
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/**
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* tegra_ivc_tx_frames_available - gets number of free entries in tx queue
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* @ivc/@ivck IVC channel or cookie
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*
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* Returns the number of unused entries in the tx queue. Assuming the caller
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* does not write any additional frames, this number may increase from the
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* value returned as the receiver consumes frames.
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*
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*/
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uint32_t tegra_hv_ivc_tx_frames_available(struct tegra_hv_ivc_cookie *ivck);
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/**
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* ivc_hv_ivc_tx_empty - Test whether the tx queue is empty
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* @ivck IVC cookie of the queue
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*
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* Test wheter the tx queue is completely empty
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*
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* Returns 1 if the queue is empty, zero otherwise
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*/
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int tegra_hv_ivc_tx_empty(struct tegra_hv_ivc_cookie *ivck);
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/**
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* ivc_hv_ivc_loopback - Sets (or clears) loopback mode
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* @ivck IVC cookie of the queue
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* @mode Set loopback on/off (1 = on, 0 = off)
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*
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* Sets or clears loopback mode accordingly.
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*
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* When loopback is active any writes are ignored, while
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* reads do not return data.
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* Incoming data are copied immediately to the tx queue.
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*
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* Returns 0 on success, a negative error code otherwise
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*/
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int tegra_hv_ivc_set_loopback(struct tegra_hv_ivc_cookie *ivck, int mode);
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/* debugging aid */
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int tegra_hv_ivc_dump(struct tegra_hv_ivc_cookie *ivck);
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/**
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* ivc_hv_ivc_read_peek - Peek (copying) data from a received frame
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* @ivck IVC cookie of the queue
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* @buf Buffer to receive the data
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* @off Offset in the frame
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* @count Count of bytes to copy
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*
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* Peek data from a received frame, copying to buf, without removing
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* the frame from the queue.
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*
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* Returns 0 on success, a negative error code otherwise
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*/
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int tegra_hv_ivc_read_peek(struct tegra_hv_ivc_cookie *ivck,
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void *buf, int off, int count);
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/**
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* ivc_hv_ivc_read_get_next_frame - Peek at the next frame to receive
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* @ivck IVC cookie of the queue
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*
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* Peek at the next frame to be received, without removing it from
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* the queue.
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*
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* Returns a pointer to the frame, or an error encoded pointer.
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*/
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void *tegra_hv_ivc_read_get_next_frame(struct tegra_hv_ivc_cookie *ivck);
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/**
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* ivc_hv_ivc_read_advance - Advance the read queue
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* @ivck IVC cookie of the queue
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*
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* Advance the read queue
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*
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* Returns 0, or a negative error value if failed.
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*/
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int tegra_hv_ivc_read_advance(struct tegra_hv_ivc_cookie *ivck);
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/**
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* ivc_hv_ivc_write_poke - Poke data to a frame to be transmitted
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* @ivck IVC cookie of the queue
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* @buf Buffer to the data
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* @off Offset in the frame
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* @count Count of bytes to copy
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*
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* Copy data to a transmit frame, copying from buf, without advancing
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* the the transmit queue.
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*
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* Returns 0 on success, a negative error code otherwise
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*/
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int tegra_hv_ivc_write_poke(struct tegra_hv_ivc_cookie *ivck,
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const void *buf, int off, int count);
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/**
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* ivc_hv_ivc_write_get_next_frame - Poke at the next frame to transmit
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* @ivck IVC cookie of the queue
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*
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* Get access to the next frame.
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*
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* Returns a pointer to the frame, or an error encoded pointer.
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*/
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void *tegra_hv_ivc_write_get_next_frame(struct tegra_hv_ivc_cookie *ivck);
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/**
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* ivc_hv_ivc_write_advance - Advance the write queue
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* @ivck IVC cookie of the queue
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*
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* Advance the write queue
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*
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* Returns 0, or a negative error value if failed.
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*/
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int tegra_hv_ivc_write_advance(struct tegra_hv_ivc_cookie *ivck);
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/**
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* tegra_hv_mempool_reserve - reserve a mempool for use
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* @id Id of the requested mempool.
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*
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* Returns a cookie representing the mempool on success, otherwise an ERR_PTR.
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*/
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struct tegra_hv_ivm_cookie *tegra_hv_mempool_reserve(unsigned id);
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/**
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* tegra_hv_mempool_release - release a reserved mempool
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* @ck Cookie returned by tegra_hv_mempool_reserve().
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*
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* Returns 0 on success or a negative error code otherwise.
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*/
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int tegra_hv_mempool_unreserve(struct tegra_hv_ivm_cookie *ck);
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/**
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* ivc_channel_notified - handle internal messages
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* @ivck IVC cookie of the queue
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*
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* This function must be called following every notification (interrupt or
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* callback invocation) for the tegra_hv_- version).
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*
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* Returns 0 if the channel is ready for communication, or -EAGAIN if a channel
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* reset is in progress.
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*/
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int tegra_hv_ivc_channel_notified(struct tegra_hv_ivc_cookie *ivck);
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/**
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* ivc_channel_reset - initiates a reset of the shared memory state
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* @ivck IVC cookie of the queue
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*
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* This function must be called after a channel is reserved before it is used
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* for communication. The channel will be ready for use when a subsequent call
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* to ivc_channel_notified() returns 0.
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*/
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void tegra_hv_ivc_channel_reset(struct tegra_hv_ivc_cookie *ivck);
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/**
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* tegra_hv_ivc_get_info - Get info of Guest shared area
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* @ivck IVC cookie of the queue
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* @pa IPA of shared area
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* @size Size of the shared area
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*
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* Get info (IPA and size) of Guest shared area
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*
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* Returns size on success and an error code otherwise
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*/
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int tegra_hv_ivc_get_info(struct tegra_hv_ivc_cookie *ivck, uint64_t *pa,
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uint64_t *size);
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/**
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* tegra_hv_ivc_notify - Notify remote guest
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* @ivck IVC cookie of the queue
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*
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* Notify remote guest
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*
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*/
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void tegra_hv_ivc_notify(struct tegra_hv_ivc_cookie *ivck);
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struct ivc *tegra_hv_ivc_convert_cookie(struct tegra_hv_ivc_cookie *ivck);
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#else
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static inline struct tegra_hv_ivc_cookie *tegra_hv_ivc_reserve(
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struct device_node *dn, int id,
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const struct tegra_hv_ivc_ops *ops)
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{
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return ERR_PTR(-ENODEV);
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}
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static inline int tegra_hv_ivc_unreserve(struct tegra_hv_ivc_cookie *ivck)
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{
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return -ENODEV;
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}
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static inline int tegra_hv_ivc_write(struct tegra_hv_ivc_cookie *ivck,
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const void *buf, size_t size)
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{
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return -ENODEV;
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}
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static inline int tegra_hv_ivc_read(struct tegra_hv_ivc_cookie *ivck,
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void *buf, size_t size)
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{
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return -ENODEV;
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}
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static inline int tegra_hv_ivc_can_read(struct tegra_hv_ivc_cookie *ivck)
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{
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return 0;
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}
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static inline int tegra_hv_ivc_can_write(struct tegra_hv_ivc_cookie *ivck)
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{
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return 0;
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}
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static inline uint32_t tegra_hv_ivc_tx_frames_available(
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struct tegra_hv_ivc_cookie *ivck)
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{
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return 0;
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}
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static inline int tegra_hv_ivc_tx_empty(struct tegra_hv_ivc_cookie *ivck)
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{
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return 0;
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}
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static inline int tegra_hv_ivc_set_loopback(struct tegra_hv_ivc_cookie *ivck,
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int mode)
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{
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return -ENODEV;
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}
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static inline int tegra_hv_ivc_dump(struct tegra_hv_ivc_cookie *ivck)
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{
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return -ENODEV;
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}
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static inline int tegra_hv_ivc_read_peek(struct tegra_hv_ivc_cookie *ivck,
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void *buf, int off, int count)
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{
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return -ENODEV;
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}
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static inline void *tegra_hv_ivc_read_get_next_frame(
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struct tegra_hv_ivc_cookie *ivck)
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{
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return ERR_PTR(-ENODEV);
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}
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static inline int tegra_hv_ivc_read_advance(struct tegra_hv_ivc_cookie *ivck)
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{
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return -ENODEV;
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}
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static inline int tegra_hv_ivc_write_poke(struct tegra_hv_ivc_cookie *ivck,
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const void *buf, int off, int count)
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{
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return -ENODEV;
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}
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static inline void *tegra_hv_ivc_write_get_next_frame(
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struct tegra_hv_ivc_cookie *ivck)
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{
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return ERR_PTR(-ENODEV);
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}
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static inline int tegra_hv_ivc_write_advance(struct tegra_hv_ivc_cookie *ivck)
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{
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return -ENODEV;
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}
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static inline struct tegra_hv_ivm_cookie *tegra_hv_mempool_reserve(unsigned id)
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{
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return ERR_PTR(-ENODEV);
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}
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static inline int tegra_hv_mempool_unreserve(struct tegra_hv_ivm_cookie *ck)
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{
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return -ENODEV;
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}
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static inline int tegra_hv_ivc_channel_notified(
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struct tegra_hv_ivc_cookie *ivck)
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{
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return -ENODEV;
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}
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static inline void tegra_hv_ivc_channel_reset(struct tegra_hv_ivc_cookie *ivck)
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{
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}
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static inline int tegra_hv_ivc_get_info(struct tegra_hv_ivc_cookie *ivck,
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uint64_t *pa, uint64_t *size)
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{
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return -ENODEV;
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}
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static inline void tegra_hv_ivc_notify(struct tegra_hv_ivc_cookie *ivck)
|
|
{
|
|
}
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|
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static inline struct ivc *tegra_hv_ivc_convert_cookie(
|
|
struct tegra_hv_ivc_cookie *ivck)
|
|
{
|
|
return ERR_PTR(-ENODEV);
|
|
}
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#endif
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#endif
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