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83ee116f72
Check L2_IDLE and L2_CLKSTOPPED in AMISC_ADSP_STATUS_0 before asserting ADSP reset in suspend flow. Standby mode in ADSP L2CC Power Control register should be enabled so that L2C clock is stopped after all cores enter WFI. Bug 3700834 Change-Id: I4b89771968dd8b72dfea9920c9125562f8dfa92d Signed-off-by: Viswanath L <viswanathl@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2759621 (cherry picked from commit 7b819575670eb1e06e510a840977101cae3367be) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2765174 Reviewed-by: Uday Gupta <udayg@nvidia.com> Reviewed-by: Sharad Gupta <sharadg@nvidia.com> Tested-by: Uday Gupta <udayg@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
24 lines
520 B
C
24 lines
520 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* amisc.h - AMISC register access
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*
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* Copyright (c) 2022 NVIDIA CORPORATION. All rights reserved.
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*
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*/
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#ifndef __TEGRA_NVADSP_AMISC_H
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#define __TEGRA_NVADSP_AMISC_H
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#include "dev.h"
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#define AMISC_ADSP_STATUS (0x14)
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#define AMISC_ADSP_L2_CLKSTOPPED (1 << 30)
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#define AMISC_ADSP_L2_IDLE (1 << 31)
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static inline u32 amisc_readl(struct nvadsp_drv_data *drv_data, u32 reg)
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{
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return readl(drv_data->base_regs[AMISC] + reg);
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}
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#endif /* __TEGRA_NVADSP_AMISC_H */
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