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git://nv-tegra.nvidia.com/linux-nv-oot.git
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d3d5025a1c
- add support to unmap the previously mapped memory - updated the data structure to store the dma pointer in user space - taking dma buf pointer from user space while unmapping JIRA SS-4006 JIRA SS-4628 Bug 3855033 Change-Id: I8ca71d11076b64af33c32e6e30c7c056828fbf75 Signed-off-by: Rahul Bedarkar <rabedarkar@nvidia.com> Signed-off-by: Prashant Kumar Shaw <pshaw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2819744 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
39 lines
924 B
C
39 lines
924 B
C
/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note)
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*
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* Copyright (c) 2021-2022, NVIDIA CORPORATION, All rights reserved.
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*/
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#ifndef _UAPI_TEGRA_FSICOM_H_
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#define _UAPI_TEGRA_FSICOM_H_
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#include <linux/ioctl.h>
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struct rw_data {
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uint32_t handle;
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uint64_t pa;
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uint64_t iova;
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uint64_t dmabuf;
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uint64_t attach;
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uint64_t sgt;
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};
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/*Data type for sending the offset,IOVA and channel Id details to FSI */
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struct iova_data {
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uint32_t offset;
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uint32_t iova;
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uint32_t chid;
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};
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/* signal value */
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#define SIG_DRIVER_RESUME 43
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#define SIG_FSI_WRITE_EVENT 44
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/* ioctl call macros */
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#define NVMAP_SMMU_MAP _IOWR('q', 1, struct rw_data *)
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#define NVMAP_SMMU_UNMAP _IOWR('q', 2, struct rw_data *)
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#define TEGRA_HSP_WRITE _IOWR('q', 3, struct rw_data *)
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#define TEGRA_SIGNAL_REG _IOWR('q', 4, struct rw_data *)
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#define TEGRA_IOVA_DATA _IOWR('q', 5, struct iova_data *)
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#endif /* _UAPI_TEGRA_FSICOM_H_ */
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