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03fd3f1188
Host1x general interrupts include actmon-related interrupts, axi timeout interrupts, and illegal access interrupts. This change enables actmon-related interrupts only. Bug 3788919 Signed-off-by: Johnny Liu <johnliu@nvidia.com> Change-Id: Iea1f1622a11afa72f70f8d10efebd857a51cc4e2 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2889825 Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
51 lines
2.2 KiB
C
51 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Tegra host1x Actmon Register Offsets
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*
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* Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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#ifndef __HOST1X_ACTMON_HARDWARE_H
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#define __HOST1X_ACTMON_HARDWARE_H
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#define HOST1X_ACTMON_MODULE_OFFSET 0x80
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#define HOST1X_ACTMON_CTRL_REG 0x0
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#define HOST1X_ACTMON_INTR_ENB_REG 0x4
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#define HOST1X_ACTMON_INTR_STATUS_REG 0x8
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#define HOST1X_ACTMON_MODULE_INIT_AVG_REG 0x14
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#define HOST1X_ACTMON_MODULE_CTRL_REG 0x80
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#define HOST1X_ACTMON_MODULE_INTR_ENB_REG 0x84
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#define HOST1X_ACTMON_MODULE_INTR_STATUS_REG 0x88
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#define HOST1X_ACTMON_MODULE_UPPER_WMARK_REG 0x8c
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#define HOST1X_ACTMON_MODULE_LOWER_WMARK_REG 0x90
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#define HOST1X_ACTMON_MODULE_AVG_UPPER_WMARK_REG 0x94
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#define HOST1X_ACTMON_MODULE_AVG_LOWER_WMARK_REG 0x98
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#define HOST1X_ACTMON_MODULE_AVG_COUNT_REG 0xa4
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#define HOST1X_ACTMON_MODULE_COUNT_WEIGHT_REG 0xa8
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#define HOST1X_ACTMON_CTRL_SOURCE(v) ((v & 0x3) << 8)
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#define HOST1X_ACTMON_CTRL_SAMPLE_TICK(v) ((v & 0x1) << 10)
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#define HOST1X_ACTMON_CTRL_SAMPLE_PERIOD(v) ((v & 0xff) << 0)
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#define HOST1X_ACTMON_MODULE_CTRL_ACTMON_ENB(v) ((v & 0x1) << 31)
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#define HOST1X_ACTMON_MODULE_CTRL_CONSEC_UPPER_NUM(v) ((v & 0x7) << 26)
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#define HOST1X_ACTMON_MODULE_CTRL_CONSEC_LOWER_NUM(v) ((v & 0x7) << 21)
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#define HOST1X_ACTMON_MODULE_CTRL_ENB_PERIODIC(v) ((v & 0x1) << 13)
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#define HOST1X_ACTMON_MODULE_CTRL_K_VAL(v) ((v & 0x7) << 10)
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#define HOST1X_ACTMON_MODULE_INTR_CONSEC_WMARK_ABOVE_ENB(v) ((v & 0x1) << 31)
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#define HOST1X_ACTMON_MODULE_INTR_CONSEC_WMARK_BELOW_ENB(v) ((v & 0x1) << 30)
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#define HOST1X_ACTMON_MODULE_INTR_AVG_WMARK_ABOVE_ENB(v) ((v & 0x1) << 29)
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#define HOST1X_ACTMON_MODULE_INTR_AVG_WMARK_BELOW_ENB(v) ((v & 0x1) << 28)
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#define HOST1X_ACTMON_CTRL_SAMPLE_PERIOD_MASK 0xff
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#define HOST1X_ACTMON_MODULE_CTRL_CONSEC_UPPER_NUM_MASK (0x7 << 26)
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#define HOST1X_ACTMON_MODULE_CTRL_CONSEC_LOWER_NUM_MASK (0x7 << 21)
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#define HOST1X_ACTMON_MODULE_CTRL_K_VAL_MASK (0x7 << 10)
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#define HOST1X_ACTMON_MODULE_INTR_CONSEC_WMARK_ABOVE BIT(31)
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#define HOST1X_ACTMON_MODULE_INTR_CONSEC_WMARK_BELOW BIT(30)
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#define HOST1X_ACTMON_MODULE_INTR_AVG_WMARK_ABOVE BIT(29)
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#define HOST1X_ACTMON_MODULE_INTR_AVG_WMARK_BELOW BIT(28)
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#endif
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