mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
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0f04d6c204
1. This change enable HR Timer Syncpoint polling and disable the thread based fence polling. 2. Default timer interval is 200usec. The timer value is taken from DT. If the timer interval in DT is less then 50usec, default timer interval is taken. Jira HOSTX-5527 Change-Id: I6644f1362f28a8901e4e384f1290be9807c30036 Signed-off-by: amitabhd <amitabhd@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3268636 GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Raghavendra Vishnu Kumar <rvk@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Santosh BS <santoshb@nvidia.com>
101 lines
2.6 KiB
C
101 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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#ifndef HOST1X_DEV_H
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#define HOST1X_DEV_H
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#include <linux/cdev.h>
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#include <linux/device.h>
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#include <linux/iommu.h>
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#include <linux/iova.h>
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include "poll.h"
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#include "syncpt.h"
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struct output;
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struct dentry;
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struct host1x_syncpt;
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int host1x_user_init(struct host1x *host);
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void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v);
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u32 host1x_sync_readl(struct host1x *host1x, u32 r);
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struct host1x_syncpt_ops {
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void (*restore)(struct host1x_syncpt *syncpt);
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u32 (*load)(struct host1x_syncpt *syncpt);
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int (*cpu_incr)(struct host1x_syncpt *syncpt);
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};
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struct host1x_info {
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u64 dma_mask; /* mask of addressable memory */
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unsigned int nb_pts; /* host1x: number of syncpoints supported */
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int (*init)(struct host1x *host1x); /* initialize per SoC ops */
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};
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struct host1x {
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const struct host1x_info *info;
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struct device *dev;
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struct dentry *debugfs;
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struct device_dma_parameters dma_parms;
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/* Charected-Dev*/
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int major;
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int next_minor;
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struct class *host1x_class;
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struct cdev cdev;
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struct device *ctrl;
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/* Resources */
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struct host1x_syncpt *syncpt;
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struct host1x_syncpt_base *bases;
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/* Resources accessible by this VM */
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unsigned int syncpt_end;
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unsigned int syncpt_base;
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unsigned int syncpt_count;
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unsigned int polling_intrval;
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#ifdef HOST1X_EMU_HRTIMER_FENCE_SCAN
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unsigned int hr_polling_intrval;
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#endif
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#ifdef HOST1X_EMU_HYPERVISOR
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void __iomem *syncpt_va_apt; /* syncpoint apperture mapped in kernel space */
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#else
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void *syncpt_va_apt;
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#endif
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u64 syncpt_phy_apt; /* syncpoint page size */
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unsigned int syncpt_page_size; /* syncpoint page size */
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/* Restricted syncpoint pools */
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unsigned int num_pools;
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unsigned int ro_pool_id;
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struct host1x_syncpt_pool *pools;
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/* Resource Ops */
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const struct host1x_syncpt_ops *syncpt_op;
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/* Resources Lock */
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struct mutex syncpt_mutex;
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};
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static inline void host1x_hw_syncpt_restore(struct host1x *host,
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struct host1x_syncpt *sp)
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{
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host->syncpt_op->restore(sp);
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}
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static inline u32 host1x_hw_syncpt_load(struct host1x *host,
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struct host1x_syncpt *sp)
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{
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return host->syncpt_op->load(sp);
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}
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static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host,
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struct host1x_syncpt *sp)
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{
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return host->syncpt_op->cpu_incr(sp);
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}
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#endif
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