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On p3898 platform, VCC_CAM can't handle high inrush current when gpios are set in parallel. Hence, a SW WAR is required to add a delay of 5ms after a gpio is set. Bug 4125801 Change-Id: Ib235cb00b5ef42c7255be5d212dd9e190630d7bc Signed-off-by: Aniket Bahadarpurkar <aniketb@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2943541 (cherry picked from commit 6e44996aae022c9e46fb431b75d60c8499bcd874) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2953356 Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com> Reviewed-by: Frank Chen <frankc@nvidia.com>
91 lines
2.3 KiB
C
91 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2015-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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#ifndef __CDI_MGR_PRIV_H__
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#define __CDI_MGR_PRIV_H__
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#include <linux/cdev.h>
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#include <linux/hrtimer.h>
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#include <media/cdi-mgr.h>
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#include "cdi-tca-priv.h"
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#define CDI_MGR_STOP_GPIO_INTR_EVENT_WAIT (~(0u))
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#define CDI_MGR_TCA9539_REGISTER_COUNT (8)
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#define CDI_MGR_TCA9539_BASE_REG_ADDR (0x00)
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#define CDI_MGR_GPIO_EVENT_QUEUE_SIZE (8)
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#define CDI_MGR_GPIO_TIMER_QUEUE_SIZE (4)
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enum cam_gpio_direction {
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CAM_DEVBLK_GPIO_UNUSED = 0,
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CAM_DEVBLK_GPIO_INPUT_INTR,
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CAM_DEVBLK_GPIO_OUTPUT
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};
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struct cam_gpio_timer_queue {
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struct hrtimer timer;
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ktime_t expires[CDI_MGR_GPIO_TIMER_QUEUE_SIZE];
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u32 head;
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u32 count;
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};
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struct cam_gpio_config {
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struct cdi_mgr_priv *mgr;
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u32 idx;
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enum cam_gpio_direction gpio_dir;
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struct gpio_desc *desc;
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int intr_irq;
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struct cam_gpio_timer_queue timers;
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ktime_t timeout;
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};
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struct cam_gpio_event_queue {
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wait_queue_head_t wait;
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struct cdi_mgr_gpio_intr events[CDI_MGR_GPIO_EVENT_QUEUE_SIZE];
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u32 head;
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u32 count;
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};
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struct cdi_mgr_priv {
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struct device *pdev; /* parent device */
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struct device *dev; /* this device */
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dev_t devt;
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struct cdev cdev;
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struct class *cdi_class;
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struct i2c_adapter *adap;
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struct cdi_mgr_platform_data *pdata;
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struct list_head dev_list;
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struct mutex mutex;
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struct dentry *d_entry;
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struct work_struct ins_work;
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struct task_struct *t;
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struct kernel_siginfo sinfo;
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int sig_no; /* store signal number from user space */
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spinlock_t spinlock;
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atomic_t in_use;
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char devname[32];
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u32 pwr_state;
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atomic_t irq_in_use;
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struct pwm_device *pwm;
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u8 des_pwr_method;
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u8 des_pwr_i2c_addr;
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struct tca9539_priv tca9539;
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struct cam_gpio_config gpios[MAX_CDI_GPIOS];
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uint32_t num_gpios;
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bool intrs_enable;
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struct cam_gpio_event_queue gpio_events;
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bool stop_err_irq_wait;
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u8 cim_ver; /* 1 - P3714 A01, 2 - P3714 A02/A03 */
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u32 cim_frsync[3]; /* FRSYNC source selection for each muxer */
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u8 pre_suspend_tca9539_regvals[CDI_MGR_TCA9539_REGISTER_COUNT];
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bool isP3898;
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};
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int cdi_mgr_power_up(struct cdi_mgr_priv *cdi_mgr, unsigned long arg);
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int cdi_mgr_power_down(struct cdi_mgr_priv *cdi_mgr, unsigned long arg);
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int cdi_mgr_debugfs_init(struct cdi_mgr_priv *cdi_mgr);
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int cdi_mgr_debugfs_remove(struct cdi_mgr_priv *cdi_mgr);
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#endif /* __CDI_MGR_PRIV_H__ */
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