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9269dac3ec
Add IO Expander support in CDI Dev to control the FRSYNC multiplexer with the speicific platform Bug 3582660 Change-Id: I3ee376e7a0bccabcfa16efb228879d4df0d65748 Signed-off-by: Junghyun Kim <juskim@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2727256 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2824551 Reviewed-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Shiva Dubey <sdubey@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
45 lines
1.1 KiB
C
45 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2020-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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#ifndef __UAPI_CDI_DEV_H__
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#define __UAPI_CDI_DEV_H__
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#include <linux/ioctl.h>
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#include <linux/types.h>
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#define CDI_DEV_PKG_FLAG_WR 1
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#define CDI_DEV_IOCTL_RW _IOW('o', 1, struct cdi_dev_package)
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#define CDI_DEV_IOCTL_GET_PWR_INFO _IOW('o', 2, struct cdi_dev_pwr_ctrl_info)
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#define CDI_DEV_IOCTL_FRSYNC_MUX _IOW('o', 3, struct cdi_dev_fsync_mux)
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#define DES_PWR_NVCCP 0U
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#define DES_PWR_GPIO 1U
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#define DES_PWR_NO_PWR 0xFFU
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#define CAM_PWR_NVCCP 0U
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#define CAM_PWR_MAX20087 1U
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#define CAM_PWR_NO_PWR 0xFFU
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#define MAX_POWER_LINKS_PER_BLOCK (4U)
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struct __attribute__ ((__packed__)) cdi_dev_pwr_ctrl_info {
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__s8 cam_pwr_method;
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__s8 cam_pwr_i2c_addr;
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__u8 cam_pwr_links[MAX_POWER_LINKS_PER_BLOCK];
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};
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struct cdi_dev_fsync_mux {
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__s8 mux_sel;
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__s8 cam_grp;
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};
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struct __attribute__ ((__packed__)) cdi_dev_package {
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__u16 offset;
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__u16 offset_len;
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__u32 size;
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__u32 flags;
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unsigned long buffer;
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};
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#endif /* __UAPI_CDI_DEV_H__ */
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