mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-22 09:11:26 +03:00
3361d37248
The physical address of Tegra Microsecond Timer USEC_CNTR_USECCVR_0 is currently hard-coded with the address from T234. The address of this register changes with newer chips. Hence, read this address from device tree. Get rid of hard-coded values of address and size. Change-Id: I416166f6f01cdb6009d4c53717e19f61cebe92e3 Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3213600 Reviewed-by: Bhavesh Parekh <bparekh@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: svc-bootloader-acv <svc-bootloader-acv@nvidia.com>