Files
linux-nv-oot/drivers/net/wireless/realtek/rtl8852ce/include/pci_ops.h
Shobek Attupurath 7dd632ff96 rtl8852ce: Add base driver v1.19.16.1-0-g1fe335ba1.20240815_PC
- support Android-14
- support Linux kernel 6.9
- support 6G regulation
- support Thermal protection
- support TX shortcut to reduce CPU loading
- fix some coverity issues
- Use RTW regulatory version rtk_8852CE_M.2_2230-67-52
- default enable con-current and MCC

Bug 4667769
Bug 4667981

Change-Id: Iee069ecdd1f00a0b78285d0a4ef5778ed9ace478
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3195601
Tested-by: Shobek Attupurath <sattupurath@nvidia.com>
Reviewed-by: Revanth Kumar Uppala <ruppala@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
2025-07-24 10:19:08 +00:00

45 lines
1.4 KiB
C

/******************************************************************************
*
* Copyright(c) 2019 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __PCI_OPS_H_
#define __PCI_OPS_H_
#ifdef RTK_129X_PLATFORM
#define PCIE_SLOT1_MEM_START 0x9804F000
#define PCIE_SLOT1_MEM_LEN 0x1000
#define PCIE_SLOT1_CTRL_START 0x9804EC00
#define PCIE_SLOT2_MEM_START 0x9803C000
#define PCIE_SLOT2_MEM_LEN 0x1000
#define PCIE_SLOT2_CTRL_START 0x9803BC00
#define PCIE_MASK_OFFSET 0x100 /* mask offset from CTRL_START */
#define PCIE_TRANSLATE_OFFSET 0x104 /* translate offset from CTRL_START */
#endif
#define PCI_BC_CLK_REQ BIT0
#define PCI_BC_ASPM_L0s BIT1
#define PCI_BC_ASPM_L1 BIT2
#define PCI_BC_ASPM_L1Off BIT3
//#define PCI_BC_ASPM_LTR BIT4
//#define PCI_BC_ASPM_OBFF BIT5
void PlatformClearPciPMEStatus(_adapter *adapter);
#ifdef CONFIG_64BIT_DMA
u8 PlatformEnableDMA64(struct pci_dev *pdev);
#endif
#endif /*__PCI_OPS_H_*/