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cc5bcef3f6
Add the upstream host1x driver with the 'Host1x/Tegra UAPI' series [0] applied. This driver will be built as an external module for use with the NVGPU driver on upstream Linux kernels. The following modifications have been made to the series posted upstream 1. Update the Makefile to always build the driver as a module 2. Remove the tests to see if CONFIG_DRM_TEGRA_STAGING is enabled 3. Rename the include/linux/host1x.h to include/linux/host1x-next.h to avoid conflicts with upstream headers when building as an external module. 4. Rename the include/uapi/linux/host1x.h to include/uapi/linux/host1x-next.h to avoid conflicts with upstream headers when building as an external module. 5. Rename the module that is built to be host1x-next.ko instead of host1x.ko to avoid any depmod conflicts with the upstream driver. [0] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=215770 Bug 3156385 Change-Id: Ic60299546809097dd0e4a9a7157bce1491d9f794 Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2435801 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
21 lines
902 B
C
21 lines
902 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2018 NVIDIA Corporation.
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*/
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#define HOST1X_HV_SYNCPT_PROT_EN 0x1ac4
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#define HOST1X_HV_SYNCPT_PROT_EN_CH_EN BIT(1)
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#define HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(x) (0x2020 + (x * 4))
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#define HOST1X_HV_CMDFIFO_PEEK_CTRL 0x233c
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#define HOST1X_HV_CMDFIFO_PEEK_CTRL_ADDR(x) (x)
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#define HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(x) ((x) << 16)
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#define HOST1X_HV_CMDFIFO_PEEK_CTRL_ENABLE BIT(31)
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#define HOST1X_HV_CMDFIFO_PEEK_READ 0x2340
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#define HOST1X_HV_CMDFIFO_PEEK_PTRS 0x2344
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#define HOST1X_HV_CMDFIFO_PEEK_PTRS_WR_PTR_V(x) (((x) >> 16) & 0xfff)
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#define HOST1X_HV_CMDFIFO_PEEK_PTRS_RD_PTR_V(x) ((x) & 0xfff)
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#define HOST1X_HV_CMDFIFO_SETUP(x) (0x2588 + (x * 4))
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#define HOST1X_HV_CMDFIFO_SETUP_LIMIT_V(x) (((x) >> 16) & 0xfff)
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#define HOST1X_HV_CMDFIFO_SETUP_BASE_V(x) ((x) & 0xfff)
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#define HOST1X_HV_ICG_EN_OVERRIDE 0x2aa8
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