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For T23x, we have a separate R5 based cluster named as Display Controller Engine(DCE) to run our Display RM code. This driver will run on CPU with the following functionality: Via debugfs for test and bring-up purposes: 1. Reads the DCE firmware image into DRAM. 2. Sets up DCE AST to cover the DCE firmware image. 3. Sets up R5 reset vector to point to DCE firmware entry point 4. Brings DCE out of reset 5. Dumps various regsiters for debug In production env: 1. Manages interrupts to CPU from DCE 2. Uses bootstrap command interface to define Admin IPC 3. Locks down bootstrap command interface 4. Uses Admin IPC to define message IPC 5. Uses Admin IPC to define message IPC payload area 6. Uses Admin IPC to set IPC channels 6. Uses Admin IPC to define crashdump area (optional) 7. Provides IPC interfaces for any DCE Client running on CCPLEX including Display RM. 8. Uses Admin IPC to set logging level (optional) This patch puts a framework in place with the following features : 1. Firmware Loading 2. AST Configuration 3. DCE Reset with EVP Programming 4. Logging Infra 5. Debugfs Support 6. Interrupt Handling 7. Mailbox Programming 8. IPC Programming 9. DCE Client Interface 10. Ftrace Support for debug purposes Change-Id: Idd28cd9254706c7313f531fcadaa7024a5b344e7 Signed-off-by: Arun Swain <arswain@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2289865 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com> Reviewed-by: Santosh Galma <galmar@nvidia.com> Reviewed-by: Mitch Luban <mluban@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Mahesh Kumar <mahkumar@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
260 lines
5.3 KiB
C
260 lines
5.3 KiB
C
/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <dce.h>
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#include <dce-ipc.h>
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#include <dce-util-common.h>
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#include <dce-client-ipc-internal.h>
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#define DCE_IPC_HANDLES_MAX 6U
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#define DCE_CLIENT_IPC_HANDLE_INVALID 0U
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#define DCE_CLIENT_IPC_HANDLE_VALID ((u32)BIT(31))
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struct tegra_dce_client_ipc client_handles[DCE_CLIENT_IPC_TYPE_MAX];
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static uint32_t dce_interface_type_map[DCE_CLIENT_IPC_TYPE_MAX] = {
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[DCE_CLIENT_IPC_TYPE_CPU_RM] = DCE_IPC_TYPE_DISPRM,
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[DCE_CLIENT_IPC_TYPE_HDCP_KMD] = DCE_IPC_TYPE_HDCP,
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};
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static inline uint32_t dce_client_get_type(uint32_t int_type)
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{
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uint32_t lc = 0;
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for (lc = 0; lc < DCE_CLIENT_IPC_TYPE_MAX; lc++)
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if (dce_interface_type_map[lc] == int_type)
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break;
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return lc;
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}
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static inline u32 client_handle_to_index(u32 handle)
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{
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return (u32)(handle & ~DCE_CLIENT_IPC_HANDLE_VALID);
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}
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static inline bool is_client_handle_valid(u32 handle)
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{
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bool valid = false;
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if ((handle & DCE_CLIENT_IPC_HANDLE_VALID) == 0U)
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goto out;
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if (client_handle_to_index(handle) >= DCE_CLIENT_IPC_TYPE_MAX)
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goto out;
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valid = true;
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out:
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return valid;
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}
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struct tegra_dce_client_ipc *dce_client_ipc_lookup_handle(u32 handle)
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{
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struct tegra_dce_client_ipc *cl = NULL;
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if (!is_client_handle_valid(handle))
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goto out;
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cl = &client_handles[client_handle_to_index(handle)];
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out:
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return cl;
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}
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static int dce_client_ipc_handle_alloc(u32 *handle)
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{
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u32 index;
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int ret = -1;
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if (handle == NULL)
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return ret;
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for (index = 0; index < DCE_CLIENT_IPC_TYPE_MAX; index++) {
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if (client_handles[index].valid == false) {
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client_handles[index].valid = true;
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*handle = (u32)(index | DCE_CLIENT_IPC_HANDLE_VALID);
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ret = 0;
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break;
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}
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}
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return ret;
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}
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static int dce_client_ipc_handle_free(u32 handle)
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{
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struct tegra_dce *d;
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struct tegra_dce_client_ipc *cl;
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if (!is_client_handle_valid(handle))
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return -EINVAL;
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cl = &client_handles[client_handle_to_index(handle)];
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if (cl->valid == false)
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return -EINVAL;
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d = cl->d;
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d->d_clients[cl->type] = NULL;
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memset(cl, 0, sizeof(struct tegra_dce_client_ipc));
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return 0;
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}
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int tegra_dce_register_ipc_client(u32 type,
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tegra_dce_client_ipc_callback_t callback_fn,
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void *data, u32 *handlep)
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{
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int ret;
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uint32_t int_type;
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struct tegra_dce *d;
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struct tegra_dce_client_ipc *cl;
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u32 handle = DCE_CLIENT_IPC_HANDLE_INVALID;
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int_type = dce_interface_type_map[type];
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d = dce_ipc_get_dce_from_ch(int_type);
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if (d == NULL) {
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ret = -EINVAL;
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goto out;
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}
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if (handlep == NULL) {
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dce_err(d, "Invalid handle pointer");
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ret = -EINVAL;
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goto out;
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}
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ret = dce_client_ipc_handle_alloc(&handle);
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if (ret)
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goto out;
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cl = &client_handles[client_handle_to_index(handle)];
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cl->d = d;
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cl->type = type;
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cl->data = data;
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cl->int_type = int_type;
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cl->callback_fn = callback_fn;
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d->d_clients[type] = cl;
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init_completion(&cl->recv_wait);
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out:
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if (ret != 0) {
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dce_client_ipc_handle_free(handle);
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handle = DCE_CLIENT_IPC_HANDLE_INVALID;
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}
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*handlep = handle;
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return ret;
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}
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EXPORT_SYMBOL(tegra_dce_register_ipc_client);
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int tegra_dce_unregister_ipc_client(u32 handle)
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{
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return dce_client_ipc_handle_free(handle);
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}
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EXPORT_SYMBOL(tegra_dce_unregister_ipc_client);
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int tegra_dce_client_ipc_send_recv(u32 handle, struct dce_ipc_message *msg)
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{
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int ret;
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struct tegra_dce_client_ipc *cl;
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if (msg == NULL) {
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ret = -1;
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goto out;
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}
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cl = dce_client_ipc_lookup_handle(handle);
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if (cl == NULL) {
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ret = -1;
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goto out;
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}
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ret = dce_ipc_send_message_sync(cl->d, cl->int_type, msg);
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out:
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return ret;
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}
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EXPORT_SYMBOL(tegra_dce_client_ipc_send_recv);
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static int dce_client_ipc_wait_rpc(struct tegra_dce *d, u32 int_type)
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{
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uint32_t type;
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struct tegra_dce_client_ipc *cl;
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type = dce_client_get_type(int_type);
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if (type >= DCE_CLIENT_IPC_TYPE_MAX) {
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dce_err(d, "Failed to retrieve client info for int_type: [%d]",
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int_type);
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return -EINVAL;
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}
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cl = d->d_clients[type];
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if ((cl == NULL) || (cl->int_type != int_type)) {
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dce_err(d, "Failed to retrieve client info for int_type: [%d]",
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int_type);
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return -EINVAL;
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}
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wait_for_completion(&cl->recv_wait);
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return 0;
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}
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int dce_client_ipc_wait(struct tegra_dce *d, u32 w_type, u32 ch_type)
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{
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int ret = 0;
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switch (w_type) {
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case DCE_IPC_WAIT_TYPE_SYNC:
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ret = dce_admin_ipc_wait(d, w_type);
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break;
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case DCE_IPC_WAIT_TYPE_RPC:
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ret = dce_client_ipc_wait_rpc(d, ch_type);
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break;
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default:
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dce_err(d, "Invalid wait type [%d]", w_type);
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break;
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}
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return ret;
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}
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void dce_client_ipc_wakeup(struct tegra_dce *d, u32 ch_type)
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{
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uint32_t type;
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struct tegra_dce_client_ipc *cl;
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type = dce_client_get_type(ch_type);
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if (type == DCE_CLIENT_IPC_TYPE_MAX) {
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dce_err(d, "Failed to retrieve client info for ch_type: [%d]",
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ch_type);
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return;
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}
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cl = d->d_clients[type];
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if ((cl == NULL) || (cl->int_type != ch_type)) {
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dce_err(d, "Failed to retrieve client info for ch_type: [%d]",
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ch_type);
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return;
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}
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complete(&cl->recv_wait);
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}
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