Files
linux-nv-oot/include/trace/events/dce_events.h
Arun Swain 606f03fbf2 platform: tegra: dce: add dce kernel driver
For T23x, we have a separate R5 based cluster
named as Display Controller Engine(DCE) to run
our Display RM code. This driver will run on CPU
with the following functionality:

Via debugfs for test and bring-up purposes:
1. Reads the DCE firmware image into DRAM.
2. Sets up DCE AST to cover the DCE firmware image.
3. Sets up R5 reset vector to point to DCE firmware
entry point
4. Brings DCE out of reset
5. Dumps various regsiters for debug

In production env:
1. Manages interrupts to CPU from DCE
2. Uses bootstrap command interface to define Admin
IPC
3. Locks down bootstrap command interface
4. Uses Admin IPC to define message IPC
5. Uses Admin IPC to define message IPC payload area
6. Uses Admin IPC to set IPC channels
6. Uses Admin IPC to define crashdump area
(optional)
7. Provides IPC interfaces for any DCE Client running
on CCPLEX including Display RM.
8. Uses Admin IPC to set logging level (optional)

This patch puts a framework in place with the
following features :
1. Firmware Loading
2. AST Configuration
3. DCE Reset with EVP Programming
4. Logging Infra
5. Debugfs Support
6. Interrupt Handling
7. Mailbox Programming
8. IPC Programming
9. DCE Client Interface
10. Ftrace Support for debug purposes

Change-Id: Idd28cd9254706c7313f531fcadaa7024a5b344e7
Signed-off-by: Arun Swain <arswain@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2289865
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-by: Santosh Galma <galmar@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Mahesh Kumar <mahkumar@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-04-14 19:23:43 +00:00

99 lines
3.2 KiB
C

/*
* include/trace/events/dce_events.h
*
* Display event logging to ftrace.
*
* Copyright (c) 2020-, NVIDIA CORPORATION, All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this program. If not, see
* <http://www.gnu.org/licenses/>.
*/
#undef TRACE_SYSTEM
#define TRACE_SYSTEM dce_events
#if !defined(_TRACE_DCE_EVENTS_H) || defined(TRACE_HEADER_MULTI_READ)
#define _TRACE_DCE_EVENTS_H
#include <dce.h>
#include <dce-ipc.h>
#include <linux/tracepoint.h>
DECLARE_EVENT_CLASS(dce_ipc_events_notifier,
TP_PROTO(struct tegra_dce *d, struct dce_ipc_channel *ch),
TP_ARGS(d, ch),
TP_STRUCT__entry(
__field_struct(struct dce_ipc_channel *, ch)
__field_struct(struct tegra_dce *, d)
),
TP_fast_assign(
__entry->ch = ch;
__entry->d = d;
),
TP_printk("Channel Type = [%u], Flags = [0x%x], Wait Type = [%u], Write Pos = [%u], Read Pos = [%u], Frame Size = [%u], "
"No of Frames = [%u], Rx Iova = [0x%llx], Tx Iova = [0x%llx], Region Current Offset = [%u], Region Iova Base = [0x%llx], "
"Region Size = [%lu] Region Base Address = [0x%p]",
__entry->ch->ch_type, __entry->ch->flags, __entry->ch->w_type,
__entry->ch->d_ivc.w_pos, __entry->ch->d_ivc.r_pos,
__entry->ch->q_info.frame_sz, __entry->ch->q_info.nframes,
__entry->ch->q_info.rx_iova, __entry->ch->q_info.tx_iova,
__entry->d->d_ipc.region.s_offset, __entry->d->d_ipc.region.iova,
__entry->d->d_ipc.region.size, __entry->d->d_ipc.region.base)
);
DEFINE_EVENT(dce_ipc_events_notifier, ivc_channel_init_complete,
TP_PROTO(struct tegra_dce *d, struct dce_ipc_channel *ch),
TP_ARGS(d, ch)
);
DEFINE_EVENT(dce_ipc_events_notifier, ivc_channel_reset_triggered,
TP_PROTO(struct tegra_dce *d, struct dce_ipc_channel *ch),
TP_ARGS(d, ch)
);
DEFINE_EVENT(dce_ipc_events_notifier, ivc_channel_reset_complete,
TP_PROTO(struct tegra_dce *d, struct dce_ipc_channel *ch),
TP_ARGS(d, ch)
);
DEFINE_EVENT(dce_ipc_events_notifier, ivc_send_req_received,
TP_PROTO(struct tegra_dce *d, struct dce_ipc_channel *ch),
TP_ARGS(d, ch)
);
DEFINE_EVENT(dce_ipc_events_notifier, ivc_send_complete,
TP_PROTO(struct tegra_dce *d, struct dce_ipc_channel *ch),
TP_ARGS(d, ch)
);
DEFINE_EVENT(dce_ipc_events_notifier, ivc_wait_complete,
TP_PROTO(struct tegra_dce *d, struct dce_ipc_channel *ch),
TP_ARGS(d, ch)
);
DEFINE_EVENT(dce_ipc_events_notifier, ivc_receive_req_received,
TP_PROTO(struct tegra_dce *d, struct dce_ipc_channel *ch),
TP_ARGS(d, ch)
);
DEFINE_EVENT(dce_ipc_events_notifier, ivc_receive_req_complete,
TP_PROTO(struct tegra_dce *d, struct dce_ipc_channel *ch),
TP_ARGS(d, ch)
);
#endif /* _TRACE_DCE_EVENTS_H */
/* This part must be outside protection */
#include <trace/define_trace.h>