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gpu: nvgpu: fix MISRA violations in Posix unit

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Fix violations of MISRA rule 5.4 in Posix unit.

JIRA NVGPU-6534

Change-Id: I9471e5fca913ca8cc19403998fdbe5450fb49879
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2488184
(cherry picked from commit f9bc21ca8d96e9c531a1b0077cfe1e78502e7ee5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2491855
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
ajesh
2021-02-23 11:03:10 +03:00
committed by mobile promotions
parent 1b5a9b28ea
commit 0030dc3eb4
23 changed files with 107 additions and 104 deletions
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4
drivers/gpu/nvgpu/common/sec2/sec2_allocator.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -31,7 +31,7 @@ int nvgpu_sec2_dmem_allocator_init(struct gk20a *g,
int err = 0;
if (!nvgpu_alloc_initialized(dmem)) {
/* Align start and end addresses */
u32 start = ALIGN(sec2_init->nv_managed_area_offset,
u32 start = NVGPU_ALIGN(sec2_init->nv_managed_area_offset,
PMU_DMEM_ALLOC_ALIGNMENT);
u32 end = (sec2_init->nv_managed_area_offset +