mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
gpu: nvgpu: update thermal programming
Add required fileds and values for thermal slow-down settings in thermal header file and implemented chip specific thermal register programming Reviewed-on: http://git-master/r/822199 (cherry picked from commit 9e8a745b8295af002b9780c83caa8dc7b22cc737) Change-Id: I016b18ed230fa6c104eada2e166ccd1a5f2ace36 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/823012 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
committed by
Terje Bergstrom
parent
057c6334f7
commit
004a1880ed
@@ -62,7 +62,8 @@ nvgpu-y := \
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gm20b/regops_gm20b.o \
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gm20b/regops_gm20b.o \
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gm20b/mc_gm20b.o \
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gm20b/mc_gm20b.o \
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gm20b/debug_gm20b.o \
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gm20b/debug_gm20b.o \
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gm20b/cde_gm20b.o
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gm20b/cde_gm20b.o \
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gm20b/therm_gm20b.o
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nvgpu-$(CONFIG_TEGRA_GK20A) += gk20a/platform_gk20a_tegra.o
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nvgpu-$(CONFIG_TEGRA_GK20A) += gk20a/platform_gk20a_tegra.o
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nvgpu-$(CONFIG_SYNC) += gk20a/sync_gk20a.o
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nvgpu-$(CONFIG_SYNC) += gk20a/sync_gk20a.o
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@@ -387,6 +387,9 @@ struct gpu_ops {
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u64 (*get_iova_addr)(struct gk20a *g, struct scatterlist *sgl,
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u64 (*get_iova_addr)(struct gk20a *g, struct scatterlist *sgl,
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u32 flags);
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u32 flags);
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} mm;
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} mm;
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struct {
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int (*init_therm_setup_hw)(struct gk20a *g);
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} therm;
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struct {
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struct {
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int (*prepare_ucode)(struct gk20a *g);
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int (*prepare_ucode)(struct gk20a *g);
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int (*pmu_setup_hw_and_bootstrap)(struct gk20a *g);
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int (*pmu_setup_hw_and_bootstrap)(struct gk20a *g);
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@@ -27,6 +27,7 @@
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#include "pmu_gk20a.h"
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#include "pmu_gk20a.h"
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#include "clk_gk20a.h"
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#include "clk_gk20a.h"
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#include "regops_gk20a.h"
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#include "regops_gk20a.h"
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#include "therm_gk20a.h"
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static struct gpu_ops gk20a_ops = {
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static struct gpu_ops gk20a_ops = {
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.clock_gating = {
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.clock_gating = {
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@@ -65,6 +66,7 @@ int gk20a_init_hal(struct gk20a *g)
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gk20a_init_clk_ops(gops);
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gk20a_init_clk_ops(gops);
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gk20a_init_regops(gops);
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gk20a_init_regops(gops);
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gk20a_init_debug_ops(gops);
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gk20a_init_debug_ops(gops);
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gk20a_init_therm_ops(gops);
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gops->name = "gk20a";
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gops->name = "gk20a";
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c->twod_class = FERMI_TWOD_A;
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c->twod_class = FERMI_TWOD_A;
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@@ -54,18 +54,66 @@ static inline u32 therm_use_a_r(void)
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{
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{
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return 0x00020798;
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return 0x00020798;
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}
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}
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static inline u32 therm_use_a_ext_therm_0_enable_f(void)
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{
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return 0x1;
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}
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static inline u32 therm_use_a_ext_therm_1_enable_f(void)
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{
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return 0x2;
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}
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static inline u32 therm_use_a_ext_therm_2_enable_f(void)
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{
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return 0x4;
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}
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static inline u32 therm_evt_ext_therm_0_r(void)
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static inline u32 therm_evt_ext_therm_0_r(void)
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{
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{
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return 0x00020700;
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return 0x00020700;
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}
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}
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static inline u32 therm_evt_ext_therm_0_slow_factor_f(u32 v)
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{
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return (v & 0x3f) << 8;
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}
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static inline u32 therm_evt_ext_therm_0_slow_factor_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 therm_evt_ext_therm_0_priority_f(u32 v)
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{
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return (v & 0x1f) << 24;
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}
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static inline u32 therm_evt_ext_therm_1_r(void)
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static inline u32 therm_evt_ext_therm_1_r(void)
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{
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{
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return 0x00020704;
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return 0x00020704;
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}
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}
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static inline u32 therm_evt_ext_therm_1_slow_factor_f(u32 v)
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{
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return (v & 0x3f) << 8;
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}
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static inline u32 therm_evt_ext_therm_1_slow_factor_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 therm_evt_ext_therm_1_priority_f(u32 v)
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{
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return (v & 0x1f) << 24;
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}
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static inline u32 therm_evt_ext_therm_2_r(void)
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static inline u32 therm_evt_ext_therm_2_r(void)
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{
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{
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return 0x00020708;
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return 0x00020708;
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}
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}
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static inline u32 therm_evt_ext_therm_2_slow_factor_f(u32 v)
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{
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return (v & 0x3f) << 8;
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}
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static inline u32 therm_evt_ext_therm_2_slow_factor_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 therm_evt_ext_therm_2_priority_f(u32 v)
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{
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return (v & 0x1f) << 24;
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}
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static inline u32 therm_weight_1_r(void)
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static inline u32 therm_weight_1_r(void)
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{
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{
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return 0x00020024;
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return 0x00020024;
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@@ -3,7 +3,7 @@
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*
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*
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* GK20A Therm
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* GK20A Therm
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*
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*
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* Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@@ -38,13 +38,20 @@ static int gk20a_init_therm_setup_hw(struct gk20a *g)
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u32 v;
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u32 v;
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/* program NV_THERM registers */
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/* program NV_THERM registers */
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gk20a_writel(g, therm_use_a_r(), NV_THERM_USE_A_INIT);
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gk20a_writel(g, therm_use_a_r(), therm_use_a_ext_therm_0_enable_f() |
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therm_use_a_ext_therm_1_enable_f() |
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therm_use_a_ext_therm_2_enable_f());
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/* priority for EXT_THERM_0 event set to highest */
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gk20a_writel(g, therm_evt_ext_therm_0_r(),
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gk20a_writel(g, therm_evt_ext_therm_0_r(),
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NV_THERM_EVT_EXT_THERM_0_INIT);
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therm_evt_ext_therm_0_slow_factor_f(1) |
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therm_evt_ext_therm_0_priority_f(3));
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gk20a_writel(g, therm_evt_ext_therm_1_r(),
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gk20a_writel(g, therm_evt_ext_therm_1_r(),
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NV_THERM_EVT_EXT_THERM_1_INIT);
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therm_evt_ext_therm_1_slow_factor_f(2) |
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therm_evt_ext_therm_1_priority_f(2));
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gk20a_writel(g, therm_evt_ext_therm_2_r(),
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gk20a_writel(g, therm_evt_ext_therm_2_r(),
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NV_THERM_EVT_EXT_THERM_2_INIT);
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therm_evt_ext_therm_2_slow_factor_f(3) |
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therm_evt_ext_therm_2_priority_f(1));
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gk20a_writel(g, therm_grad_stepping_table_r(0),
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gk20a_writel(g, therm_grad_stepping_table_r(0),
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therm_grad_stepping_table_slowdown_factor0_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by1p5_f()) |
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therm_grad_stepping_table_slowdown_factor0_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by1p5_f()) |
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@@ -92,9 +99,15 @@ int gk20a_init_therm_support(struct gk20a *g)
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if (err)
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if (err)
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return err;
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return err;
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err = gk20a_init_therm_setup_hw(g);
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if (g->ops.therm.init_therm_setup_hw)
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err = g->ops.therm.init_therm_setup_hw(g);
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if (err)
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if (err)
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return err;
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return err;
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return err;
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return err;
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}
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}
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void gk20a_init_therm_ops(struct gpu_ops *gops)
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{
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gops->therm.init_therm_setup_hw = gk20a_init_therm_setup_hw;
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}
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@@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2011 - 2014, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2011 - 2015, NVIDIA CORPORATION. All rights reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@@ -16,13 +16,8 @@
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#ifndef THERM_GK20A_H
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#ifndef THERM_GK20A_H
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#define THERM_GK20A_H
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#define THERM_GK20A_H
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/* priority for EXT_THERM_0 event set to highest */
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struct gpu_ops;
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#define NV_THERM_EVT_EXT_THERM_0_INIT 0x3000100
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void gk20a_init_therm_ops(struct gpu_ops *gops);
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#define NV_THERM_EVT_EXT_THERM_1_INIT 0x2000200
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#define NV_THERM_EVT_EXT_THERM_2_INIT 0x1000300
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/* configures the thermal events that may cause clock slowdown */
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#define NV_THERM_USE_A_INIT 0x7
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int gk20a_init_therm_support(struct gk20a *g);
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int gk20a_init_therm_support(struct gk20a *g);
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#endif /* THERM_GK20A_H */
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#endif /* THERM_GK20A_H */
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@@ -33,6 +33,7 @@
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#include "regops_gm20b.h"
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#include "regops_gm20b.h"
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#include "debug_gm20b.h"
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#include "debug_gm20b.h"
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#include "cde_gm20b.h"
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#include "cde_gm20b.h"
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#include "therm_gm20b.h"
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#define FUSE_OPT_PRIV_SEC_DIS_0 0x264
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#define FUSE_OPT_PRIV_SEC_DIS_0 0x264
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#define PRIV_SECURITY_DISABLE 0x01
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#define PRIV_SECURITY_DISABLE 0x01
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@@ -136,6 +137,7 @@ int gm20b_init_hal(struct gk20a *g)
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gm20b_init_regops(gops);
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gm20b_init_regops(gops);
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gm20b_init_debug_ops(gops);
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gm20b_init_debug_ops(gops);
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gm20b_init_cde_ops(gops);
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gm20b_init_cde_ops(gops);
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gm20b_init_therm_ops(gops);
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gops->name = "gm20b";
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gops->name = "gm20b";
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c->twod_class = FERMI_TWOD_A;
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c->twod_class = FERMI_TWOD_A;
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@@ -54,18 +54,54 @@ static inline u32 therm_use_a_r(void)
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{
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{
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return 0x00020798;
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return 0x00020798;
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}
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}
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static inline u32 therm_use_a_ext_therm_0_enable_f(void)
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{
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return 0x1;
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}
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static inline u32 therm_use_a_ext_therm_1_enable_f(void)
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{
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return 0x2;
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}
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static inline u32 therm_use_a_ext_therm_2_enable_f(void)
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{
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return 0x4;
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}
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static inline u32 therm_evt_ext_therm_0_r(void)
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static inline u32 therm_evt_ext_therm_0_r(void)
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{
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{
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return 0x00020700;
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return 0x00020700;
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}
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}
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static inline u32 therm_evt_ext_therm_0_slow_factor_f(u32 v)
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{
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return (v & 0x3f) << 8;
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}
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static inline u32 therm_evt_ext_therm_0_slow_factor_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 therm_evt_ext_therm_1_r(void)
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static inline u32 therm_evt_ext_therm_1_r(void)
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{
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{
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return 0x00020704;
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return 0x00020704;
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}
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}
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static inline u32 therm_evt_ext_therm_1_slow_factor_f(u32 v)
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{
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return (v & 0x3f) << 8;
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}
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static inline u32 therm_evt_ext_therm_1_slow_factor_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 therm_evt_ext_therm_2_r(void)
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static inline u32 therm_evt_ext_therm_2_r(void)
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{
|
{
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return 0x00020708;
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return 0x00020708;
|
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}
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}
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static inline u32 therm_evt_ext_therm_2_slow_factor_f(u32 v)
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{
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return (v & 0x3f) << 8;
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|
}
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static inline u32 therm_evt_ext_therm_2_slow_factor_init_v(void)
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{
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|
return 0x00000000;
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|
}
|
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static inline u32 therm_weight_1_r(void)
|
static inline u32 therm_weight_1_r(void)
|
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{
|
{
|
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return 0x00020024;
|
return 0x00020024;
|
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|
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72
drivers/gpu/nvgpu/gm20b/therm_gm20b.c
Normal file
72
drivers/gpu/nvgpu/gm20b/therm_gm20b.c
Normal file
@@ -0,0 +1,72 @@
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|
/*
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|
* GM20B THERMAL
|
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|
*
|
||||||
|
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms and conditions of the GNU General Public License,
|
||||||
|
* version 2, as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*/
|
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|
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|
#include "gk20a/gk20a.h"
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#include "hw_therm_gm20b.h"
|
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|
|
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static int gm20b_init_therm_setup_hw(struct gk20a *g)
|
||||||
|
{
|
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|
u32 v;
|
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|
|
||||||
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gk20a_dbg_fn("");
|
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|
|
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/* program NV_THERM registers */
|
||||||
|
gk20a_writel(g, therm_use_a_r(), therm_use_a_ext_therm_0_enable_f() |
|
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|
therm_use_a_ext_therm_1_enable_f() |
|
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|
therm_use_a_ext_therm_2_enable_f());
|
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|
gk20a_writel(g, therm_evt_ext_therm_0_r(),
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therm_evt_ext_therm_0_slow_factor_f(1));
|
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|
gk20a_writel(g, therm_evt_ext_therm_1_r(),
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|
therm_evt_ext_therm_1_slow_factor_f(2));
|
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|
gk20a_writel(g, therm_evt_ext_therm_2_r(),
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|
therm_evt_ext_therm_2_slow_factor_f(3));
|
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|
|
||||||
|
gk20a_writel(g, therm_grad_stepping_table_r(0),
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||||||
|
therm_grad_stepping_table_slowdown_factor0_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by1p5_f()) |
|
||||||
|
therm_grad_stepping_table_slowdown_factor1_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by2_f()) |
|
||||||
|
therm_grad_stepping_table_slowdown_factor2_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by4_f()) |
|
||||||
|
therm_grad_stepping_table_slowdown_factor3_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f()) |
|
||||||
|
therm_grad_stepping_table_slowdown_factor4_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f()));
|
||||||
|
gk20a_writel(g, therm_grad_stepping_table_r(1),
|
||||||
|
therm_grad_stepping_table_slowdown_factor0_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f()) |
|
||||||
|
therm_grad_stepping_table_slowdown_factor1_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f()) |
|
||||||
|
therm_grad_stepping_table_slowdown_factor2_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f()) |
|
||||||
|
therm_grad_stepping_table_slowdown_factor3_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f()) |
|
||||||
|
therm_grad_stepping_table_slowdown_factor4_f(therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f()));
|
||||||
|
|
||||||
|
v = gk20a_readl(g, therm_clk_timing_r(0));
|
||||||
|
v |= therm_clk_timing_grad_slowdown_enabled_f();
|
||||||
|
gk20a_writel(g, therm_clk_timing_r(0), v);
|
||||||
|
|
||||||
|
v = gk20a_readl(g, therm_config2_r());
|
||||||
|
v |= therm_config2_grad_enable_f(1);
|
||||||
|
v |= therm_config2_slowdown_factor_extended_f(1);
|
||||||
|
gk20a_writel(g, therm_config2_r(), v);
|
||||||
|
|
||||||
|
gk20a_writel(g, therm_grad_stepping1_r(),
|
||||||
|
therm_grad_stepping1_pdiv_duration_f(32));
|
||||||
|
|
||||||
|
v = gk20a_readl(g, therm_grad_stepping0_r());
|
||||||
|
v |= therm_grad_stepping0_feature_enable_f();
|
||||||
|
gk20a_writel(g, therm_grad_stepping0_r(), v);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void gm20b_init_therm_ops(struct gpu_ops *gops)
|
||||||
|
{
|
||||||
|
gops->therm.init_therm_setup_hw = gm20b_init_therm_setup_hw;
|
||||||
|
|
||||||
|
}
|
||||||
21
drivers/gpu/nvgpu/gm20b/therm_gm20b.h
Normal file
21
drivers/gpu/nvgpu/gm20b/therm_gm20b.h
Normal file
@@ -0,0 +1,21 @@
|
|||||||
|
/*
|
||||||
|
* GM20B THERMAL
|
||||||
|
*
|
||||||
|
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms and conditions of the GNU General Public License,
|
||||||
|
* version 2, as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*/
|
||||||
|
#ifndef THERM_GM20B_H
|
||||||
|
#define THERM_GM20B_H
|
||||||
|
|
||||||
|
struct gpu_ops;
|
||||||
|
void gm20b_init_therm_ops(struct gpu_ops *gops);
|
||||||
|
|
||||||
|
#endif /* THERM_GM20B_H */
|
||||||
Reference in New Issue
Block a user