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gpu: nvgpu: accept small_big_split in vm_init

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Currently, when unified address space is not requested, nvgpu_vm_init
splits user vm at a fixed address of 56G.
Modify nvgpu_vm_init to allow user to specify small big page vm split.

JIRA NVGPU-5302

Change-Id: I6ed33a4dc080f10a723cb9bd486f0d36c0cee0e9
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2428326
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Sami Kiminki <skiminki@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2020-10-14 19:05:47 -07:00
committed by Alex Waterman
parent 7f9ce100f8
commit 00d1e10ff2
20 changed files with 90 additions and 44 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/common/mm/as.c
View File

@@ -89,6 +89,7 @@ static int gk20a_vm_alloc_share(struct gk20a_as_share *as_share,
nvgpu_safe_sub_u64(mm->channel.kernel_size,
U64(big_page_size) << U64(10))),
mm->channel.kernel_size,
nvgpu_gmmu_va_small_page_limit(),
!mm->disable_bigpage,
userspace_managed, unified_va, name);
if (vm == NULL) {

25
drivers/gpu/nvgpu/common/mm/mm.c
View File

@@ -207,6 +207,7 @@ static int nvgpu_init_system_vm(struct mm_gk20a *mm)
low_hole,
0ULL,
nvgpu_safe_sub_u64(aperture_size, low_hole),
0ULL,
true,
false,
false,
@@ -255,7 +256,9 @@ static int nvgpu_init_cde_vm(struct mm_gk20a *mm)
U64(big_page_size) << U64(10),
nvgpu_safe_sub_u64(user_size,
U64(big_page_size) << U64(10)),
kernel_size, false, false, false, "cde");
kernel_size,
0ULL,
false, false, false, "cde");
if (mm->cde.vm == NULL) {
return -ENOMEM;
}
@@ -274,7 +277,9 @@ static int nvgpu_init_ce_vm(struct mm_gk20a *mm)
U64(big_page_size) << U64(10),
nvgpu_safe_sub_u64(user_size,
U64(big_page_size) << U64(10)),
kernel_size, false, false, false, "ce");
kernel_size,
0ULL,
false, false, false, "ce");
if (mm->ce.vm == NULL) {
return -ENOMEM;
}
@@ -336,13 +341,13 @@ static int nvgpu_init_bar1_vm(struct mm_gk20a *mm)
mm->bar1.aperture_size = bar1_aperture_size_mb_gk20a() << 20;
nvgpu_log_info(g, "bar1 vm size = 0x%x", mm->bar1.aperture_size);
mm->bar1.vm = nvgpu_vm_init(g,
big_page_size,
SZ_64K,
0ULL,
nvgpu_safe_sub_u64(mm->bar1.aperture_size,
SZ_64K),
true, false, false,
"bar1");
big_page_size,
SZ_64K,
0ULL,
nvgpu_safe_sub_u64(mm->bar1.aperture_size, SZ_64K),
0ULL,
true, false, false,
"bar1");
if (mm->bar1.vm == NULL) {
return -ENOMEM;
}
@@ -373,7 +378,7 @@ static int nvgpu_init_engine_ucode_vm(struct gk20a *g,
ucode->aperture_size);
ucode->vm = nvgpu_vm_init(g, big_page_size, SZ_4K,
0ULL, nvgpu_safe_sub_u64(ucode->aperture_size, SZ_4K),
0ULL, nvgpu_safe_sub_u64(ucode->aperture_size, SZ_4K), 0ULL,
false, false, false,
address_space_name);
if (ucode->vm == NULL) {

29
drivers/gpu/nvgpu/common/mm/vm.c
View File

@@ -617,9 +617,9 @@ static int nvgpu_vm_init_check_vma_limits(struct gk20a *g, struct vm_gk20a *vm,
}
static int nvgpu_vm_init_vma(struct gk20a *g, struct vm_gk20a *vm,
u64 low_hole,
u64 user_reserved,
u64 kernel_reserved,
u64 small_big_split,
bool big_pages,
bool unified_va,
const char *name)
@@ -645,9 +645,20 @@ static int nvgpu_vm_init_vma(struct gk20a *g, struct vm_gk20a *vm,
user_lp_vma_start = user_vma_limit;
user_lp_vma_limit = user_vma_limit;
} else {
/*
* Ensure small_big_split falls between user vma
* start and end.
*/
if ((small_big_split <= vm->va_start) ||
(small_big_split >=
nvgpu_safe_sub_u64(vm->va_limit,
kernel_reserved))) {
return -EINVAL;
}
user_vma_start = vm->va_start;
user_vma_limit = nvgpu_gmmu_va_small_page_limit();
user_lp_vma_start = nvgpu_gmmu_va_small_page_limit();
user_vma_limit = small_big_split;
user_lp_vma_start = small_big_split;
user_lp_vma_limit = nvgpu_safe_sub_u64(vm->va_limit,
kernel_reserved);
}
@@ -741,7 +752,7 @@ static int nvgpu_vm_init_attributes(struct mm_gk20a *mm,
nvgpu_safe_cast_u64_to_u32(SZ_4K);
vm->gmmu_page_sizes[GMMU_PAGE_SIZE_BIG] = big_page_size;
vm->gmmu_page_sizes[GMMU_PAGE_SIZE_KERNEL] =
nvgpu_safe_cast_u64_to_u32(NVGPU_CPU_PAGE_SIZE);
nvgpu_safe_cast_u64_to_u32(NVGPU_CPU_PAGE_SIZE);
/* Set up vma pointers. */
vm->vma[GMMU_PAGE_SIZE_SMALL] = &vm->user;
@@ -778,6 +789,7 @@ int nvgpu_vm_do_init(struct mm_gk20a *mm,
u64 low_hole,
u64 user_reserved,
u64 kernel_reserved,
u64 small_big_split,
bool big_pages,
bool userspace_managed,
bool unified_va,
@@ -809,8 +821,8 @@ int nvgpu_vm_do_init(struct mm_gk20a *mm,
goto clean_up_gpu_vm;
}
err = nvgpu_vm_init_vma(g, vm, low_hole, user_reserved, kernel_reserved,
big_pages, unified_va, name);
err = nvgpu_vm_init_vma(g, vm, user_reserved, kernel_reserved,
small_big_split, big_pages, unified_va, name);
if (err != 0) {
goto clean_up_gpu_vm;
}
@@ -893,6 +905,7 @@ struct vm_gk20a *nvgpu_vm_init(struct gk20a *g,
u64 low_hole,
u64 user_reserved,
u64 kernel_reserved,
u64 small_big_split,
bool big_pages,
bool userspace_managed,
bool unified_va,
@@ -906,8 +919,8 @@ struct vm_gk20a *nvgpu_vm_init(struct gk20a *g,
}
err = nvgpu_vm_do_init(&g->mm, vm, big_page_size, low_hole,
user_reserved, kernel_reserved, big_pages,
userspace_managed, unified_va, name);
user_reserved, kernel_reserved, small_big_split,
big_pages, userspace_managed, unified_va, name);
if (err != 0) {
nvgpu_kfree(g, vm);
return NULL;

4
drivers/gpu/nvgpu/common/perf/perfbuf.c
View File

@@ -92,7 +92,9 @@ int nvgpu_perfbuf_init_vm(struct gk20a *g)
mm->perfbuf.vm = nvgpu_vm_init(g, big_page_size, SZ_4K,
nvgpu_safe_sub_u64(user_size, SZ_4K),
kernel_size, false, false, false, "perfbuf");
kernel_size,
0ULL,
false, false, false, "perfbuf");
if (mm->perfbuf.vm == NULL) {
return -ENOMEM;
}

2
drivers/gpu/nvgpu/hal/mm/mm_gp10b_fusa.c
View File

@@ -39,7 +39,7 @@ int gp10b_mm_init_bar2_vm(struct gk20a *g)
nvgpu_log_info(g, "bar2 vm size = 0x%x", mm->bar2.aperture_size);
mm->bar2.vm = nvgpu_vm_init(g, big_page_size, SZ_4K,
0ULL, nvgpu_safe_sub_u64(mm->bar2.aperture_size, SZ_4K),
0ULL, nvgpu_safe_sub_u64(mm->bar2.aperture_size, SZ_4K), 0ULL,
false, false, false, "bar2");
if (mm->bar2.vm == NULL) {
return -ENOMEM;

8
drivers/gpu/nvgpu/include/nvgpu/vm.h
View File

@@ -735,6 +735,7 @@ void nvgpu_insert_mapped_buf(struct vm_gk20a *vm,
* the address space).
* @param user_reserved [in] Space reserved for user allocations.
* @param kernel_reserved [in] Space reserved for kernel only allocations.
* @param small_big_split [in] Specifies small big page address split.
* @param big_pages [in] If true then big pages are possible in the
* VM. Note this does not guarantee that big
* pages will be possible.
@@ -763,6 +764,7 @@ int nvgpu_vm_do_init(struct mm_gk20a *mm,
u64 low_hole,
u64 user_reserved,
u64 kernel_reserved,
u64 small_big_split,
bool big_pages,
bool userspace_managed,
bool unified_va,
@@ -779,6 +781,7 @@ int nvgpu_vm_do_init(struct mm_gk20a *mm,
* the address space).
* @param user_reserved [in] Space reserved for user allocations.
* @param kernel_reserved [in] Space reserved for kernel only allocations.
* @param small_big_split [in] Specifies small big page address split.
* @param big_pages [in] If true then big pages are possible in the
* VM. Note this does not guarantee that big
* pages will be possible.
@@ -792,11 +795,11 @@ int nvgpu_vm_do_init(struct mm_gk20a *mm,
* | |
* +--+ @low_hole
* | |
* ~ ~ This is the "user" section.
* ~ ~ This is the "user" section, @user_reserved.
* | |
* +--+ @aperture_size - @kernel_reserved
* | |
* ~ ~ This is the "kernel" section.
* ~ ~ This is the "kernel" section, @kernel_reserved.
* | |
* +--+ @aperture_size
*
@@ -819,6 +822,7 @@ struct vm_gk20a *nvgpu_vm_init(struct gk20a *g,
u64 low_hole,
u64 user_reserved,
u64 kernel_reserved,
u64 small_big_split,
bool big_pages,
bool userspace_managed,
bool unified_va,