diff --git a/arch/nvgpu-common.yaml b/arch/nvgpu-common.yaml index e0e3d8cf5..ca63e62db 100644 --- a/arch/nvgpu-common.yaml +++ b/arch/nvgpu-common.yaml @@ -653,8 +653,7 @@ pmu: owner: Sagar K # Subset of each interfaces should be distributed to individual units. # TODO! - sources: [ include/nvgpu/pmu/pmuif/ctrlboardobj.h, - include/nvgpu/pmu/pmuif/ctrlpmgr.h, + sources: [ include/nvgpu/pmu/pmuif/ctrlpmgr.h, include/nvgpu/pmu/pmuif/acr.h, include/nvgpu/pmu/pmuif/ap.h, include/nvgpu/pmu/pmuif/cmn.h, @@ -663,7 +662,6 @@ pmu: include/nvgpu/pmu/pmuif/pg_rppg.h, include/nvgpu/pmu/pmuif/init.h, include/nvgpu/pmu/pmuif/bios.h, - include/nvgpu/pmu/pmuif/boardobj.h, include/nvgpu/pmu/pmuif/pmgr.h, include/nvgpu/pmu/pmuif/seq.h, include/nvgpu/pmu/pmuif/rpc.h, @@ -676,7 +674,8 @@ pmu: safe: yes gpu: dgpu sources: [ common/pmu/boardobj/boardobj.c, - include/nvgpu/boardobj.h ] + common/pmu/boardobj/boardobj.h, + common/pmu/boardobj/ucode_boardobj_inf.h ] boardobjgrp: safe: yes gpu: dgpu diff --git a/drivers/gpu/nvgpu/common/pmu/boardobj/boardobj.c b/drivers/gpu/nvgpu/common/pmu/boardobj/boardobj.c index 0f34acbd9..b47842588 100644 --- a/drivers/gpu/nvgpu/common/pmu/boardobj/boardobj.c +++ b/drivers/gpu/nvgpu/common/pmu/boardobj/boardobj.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,7 +22,8 @@ #include #include -#include + +#include "boardobj.h" /* * Destructor for the base board object. Called by each device-Specific diff --git a/drivers/gpu/nvgpu/include/nvgpu/boardobj.h b/drivers/gpu/nvgpu/common/pmu/boardobj/boardobj.h similarity index 90% rename from drivers/gpu/nvgpu/include/nvgpu/boardobj.h rename to drivers/gpu/nvgpu/common/pmu/boardobj/boardobj.h index 08746a5e1..6718fb776 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/boardobj.h +++ b/drivers/gpu/nvgpu/common/pmu/boardobj/boardobj.h @@ -23,14 +23,10 @@ #ifndef NVGPU_BOARDOBJ_H #define NVGPU_BOARDOBJ_H -#include -#include -#include -#include - struct boardobj; struct nvgpu_list_node; struct gk20a; +struct nv_pmu_boardobj; /* * Fills out the appropriate the nv_pmu_xxxx_device_desc_ driver->PMU @@ -74,15 +70,6 @@ struct boardobj { struct nvgpu_list_node node; }; -struct boardobjgrp_pmucmdhandler_params { - /* Pointer to the BOARDOBJGRP associated with this CMD */ - struct boardobjgrp *pboardobjgrp; - /* Pointer to structure representing this NV_PMU_BOARDOBJ_CMD_GRP */ - struct boardobjgrp_pmu_cmd *pcmd; - /* Boolean indicating whether the PMU successfully handled the CMD */ - u32 success; -}; - #define BOARDOBJ_GET_TYPE(pobj) (((struct boardobj *)(void *)(pobj))->type) #define BOARDOBJ_GET_IDX(pobj) (((struct boardobj *)(void *)(pobj))->idx) diff --git a/drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrp.c b/drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrp.c index 4016b70c7..7db40ca02 100644 --- a/drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrp.c +++ b/drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrp.c @@ -22,11 +22,12 @@ #include #include -#include #include #include #include +#include "boardobj.h" + static int check_boardobjgrp_param(struct gk20a *g, struct boardobjgrp *pboardobjgrp) { diff --git a/drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrpmask.c b/drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrpmask.c index 6408a0d3b..06d648913 100644 --- a/drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrpmask.c +++ b/drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrpmask.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,8 +20,8 @@ * DEALINGS IN THE SOFTWARE. */ #include -#include #include +#include "boardobj.h" /* * Assures that unused bits (size .. (maskDataCount * 32 - 1)) are always zero. diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/boardobj.h b/drivers/gpu/nvgpu/common/pmu/boardobj/ucode_boardobj_inf.h similarity index 81% rename from drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/boardobj.h rename to drivers/gpu/nvgpu/common/pmu/boardobj/ucode_boardobj_inf.h index b7e7fb619..755fbdd0f 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/boardobj.h +++ b/drivers/gpu/nvgpu/common/pmu/boardobj/ucode_boardobj_inf.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -23,8 +23,7 @@ #define NVGPU_PMUIF_BOARDOBJ_H #include - -#include "ctrlboardobj.h" +#include /* board object group command id's. */ #define NV_PMU_BOARDOBJGRP_CMD_SET 0x00U @@ -38,6 +37,67 @@ #define NV_PMU_RPC_ID_THERM_BOARD_OBJ_GRP_CMD 0x00U #define NV_PMU_RPC_ID_VOLT_BOARD_OBJ_GRP_CMD 0x00U +#define CTRL_BOARDOBJGRP_TYPE_INVALID 0x00U +#define CTRL_BOARDOBJGRP_TYPE_E32 0x01U +#define CTRL_BOARDOBJGRP_TYPE_E255 0x02U + +#define CTRL_BOARDOBJGRP_E32_MAX_OBJECTS 32U +#define CTRL_BOARDOBJGRP_E255_MAX_OBJECTS 255U + +#define CTRL_BOARDOBJ_MAX_BOARD_OBJECTS \ + CTRL_BOARDOBJGRP_E32_MAX_OBJECTS + +#define CTRL_BOARDOBJ_IDX_INVALID 255U + +#define CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_BIT_SIZE 32U + +#define CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_INDEX(_bit) \ + ((_bit) / CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_BIT_SIZE) + +#define CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_OFFSET(_bit) \ + ((_bit) % CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_BIT_SIZE) + +#define CTRL_BOARDOBJGRP_MASK_DATA_SIZE(_bits) \ + (CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_INDEX((_bits) - 1U) + 1U) + +#define CTRL_BOARDOBJGRP_MASK_ARRAY_START_SIZE 1U +#define CTRL_BOARDOBJGRP_MASK_ARRAY_EXTENSION_SIZE(_bits) \ + (CTRL_BOARDOBJGRP_MASK_DATA_SIZE(_bits) - \ + CTRL_BOARDOBJGRP_MASK_ARRAY_START_SIZE) + +struct ctrl_boardobj { + u8 type; +}; + +struct ctrl_boardobjgrp_mask { + u32 data[1]; +}; + +struct ctrl_boardobjgrp_mask_e32 { + struct ctrl_boardobjgrp_mask super; +}; + +struct ctrl_boardobjgrp_mask_e255 { + struct ctrl_boardobjgrp_mask super; + u32 data_e255[7]; +}; + +struct ctrl_boardobjgrp_super { + struct ctrl_boardobjgrp_mask obj_mask; +}; + +struct ctrl_boardobjgrp_e32 { + struct ctrl_boardobjgrp_mask_e32 obj_mask; +}; + +struct CTRL_boardobjgrp_e255 { + struct ctrl_boardobjgrp_mask_e255 obj_mask; +}; + +struct ctrl_boardobjgrp { + u32 obj_mask; +}; + /* * Base structure describing a BOARDOBJ for communication between Kernel and * PMU. diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.h b/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.h index 553e44260..08c90f2c6 100644 --- a/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.h +++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.h @@ -23,7 +23,6 @@ #ifndef NVGPU_CLK_DOMAIN_H #define NVGPU_CLK_DOMAIN_H -#include #include #define CLK_DOMAIN_BOARDOBJGRP_VERSION 0x30 diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.h b/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.h index 77a3b1415..60b69c4e7 100644 --- a/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.h +++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.h @@ -23,7 +23,6 @@ #ifndef NVGPU_CLK_PROG_H #define NVGPU_CLK_PROG_H -#include #include #include #include diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.h b/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.h index 47cd2ae58..2c060855f 100644 --- a/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.h +++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.h @@ -23,9 +23,9 @@ #ifndef NVGPU_CLK_VIN_H #define NVGPU_CLK_VIN_H -#include #include #include +#include typedef u32 vin_device_state_load(struct gk20a *g, struct nvgpu_clk_pmupstate *clk, struct clk_vin_device *pdev); diff --git a/drivers/gpu/nvgpu/common/pmu/clk/ucode_clk_inf.h b/drivers/gpu/nvgpu/common/pmu/clk/ucode_clk_inf.h index d43d6bd66..a62b36625 100644 --- a/drivers/gpu/nvgpu/common/pmu/clk/ucode_clk_inf.h +++ b/drivers/gpu/nvgpu/common/pmu/clk/ucode_clk_inf.h @@ -25,9 +25,8 @@ #include #include -#include -#include #include +#include /*! * Various types of VIN calibration that the GPU can support diff --git a/drivers/gpu/nvgpu/common/pmu/fw/fw_ver_ops.c b/drivers/gpu/nvgpu/common/pmu/fw/fw_ver_ops.c index 794f45203..e79d8083c 100644 --- a/drivers/gpu/nvgpu/common/pmu/fw/fw_ver_ops.c +++ b/drivers/gpu/nvgpu/common/pmu/fw/fw_ver_ops.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include #include @@ -39,6 +38,7 @@ #include #include #include +#include /* PMU F/W version */ #define APP_VERSION_TU10X 28084434U diff --git a/drivers/gpu/nvgpu/common/pmu/perf/change_seq.c b/drivers/gpu/nvgpu/common/pmu/perf/change_seq.c index 720adca27..fd752f12b 100644 --- a/drivers/gpu/nvgpu/common/pmu/perf/change_seq.c +++ b/drivers/gpu/nvgpu/common/pmu/perf/change_seq.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include @@ -32,6 +31,7 @@ #include #include #include +#include #include "change_seq.h" #include "perf.h" diff --git a/drivers/gpu/nvgpu/common/pmu/perf/pstate.c b/drivers/gpu/nvgpu/common/pmu/perf/pstate.c index 78880e850..b4bbf3a5a 100644 --- a/drivers/gpu/nvgpu/common/pmu/perf/pstate.c +++ b/drivers/gpu/nvgpu/common/pmu/perf/pstate.c @@ -25,13 +25,13 @@ #include #include #include -#include #include #include #include #include #include #include +#include #include "ucode_perf_pstate_inf.h" #include "pstate.h" diff --git a/drivers/gpu/nvgpu/common/pmu/pmgr/pwrdev.h b/drivers/gpu/nvgpu/common/pmu/pmgr/pwrdev.h index 3762999f9..f3f86e7c9 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmgr/pwrdev.h +++ b/drivers/gpu/nvgpu/common/pmu/pmgr/pwrdev.h @@ -1,7 +1,7 @@ /* * general power device structures & definitions * - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -24,10 +24,10 @@ #ifndef NVGPU_PMGR_PWRDEV_H #define NVGPU_PMGR_PWRDEV_H -#include #include #include #include +#include #define PWRDEV_I2CDEV_DEVICE_INDEX_NONE (0xFF) diff --git a/drivers/gpu/nvgpu/common/pmu/pmgr/pwrmonitor.h b/drivers/gpu/nvgpu/common/pmu/pmgr/pwrmonitor.h index 47beff9de..b21c4e188 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmgr/pwrmonitor.h +++ b/drivers/gpu/nvgpu/common/pmu/pmgr/pwrmonitor.h @@ -1,7 +1,7 @@ /* * general power channel structures & definitions * - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,8 +26,8 @@ #include #include -#include #include +#include struct pwr_channel { struct boardobj super; diff --git a/drivers/gpu/nvgpu/common/pmu/pmgr/pwrpolicy.h b/drivers/gpu/nvgpu/common/pmu/pmgr/pwrpolicy.h index 3c4e10fb0..33ea2ef5c 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmgr/pwrpolicy.h +++ b/drivers/gpu/nvgpu/common/pmu/pmgr/pwrpolicy.h @@ -1,7 +1,7 @@ /* * general power channel structures & definitions * - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -26,8 +26,8 @@ #include #include -#include #include +#include #define PWR_POLICY_EXT_POWER_STATE_ID_COUNT 0x4U diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c index 5d117f581..6b50e503f 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu.c @@ -27,10 +27,11 @@ #include #include #include -#include #include #include +#include "boardobj/boardobj.h" + /* PMU H/W error functions */ void nvgpu_pmu_report_bar0_pri_err_status(struct gk20a *g, u32 bar0_status, u32 error_type) diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_pstate.c b/drivers/gpu/nvgpu/common/pmu/pmu_pstate.c index 0aa949746..3fb993743 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_pstate.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_pstate.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include @@ -36,6 +35,8 @@ #include #include +#include "boardobj/boardobj.h" + void nvgpu_pmu_pstate_deinit(struct gk20a *g) { pmgr_pmu_free_pmupstate(g); diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c b/drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c index b7909e65c..cc3209108 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include @@ -40,6 +39,8 @@ #include #include +#include "boardobj/boardobj.h" + #ifdef CONFIG_NVGPU_POWER_PG #include #endif diff --git a/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface_priv.h b/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface_priv.h index 832685aaa..9c61ec0c4 100644 --- a/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface_priv.h +++ b/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface_priv.h @@ -24,9 +24,9 @@ #define SUPER_SURFACE_PRIV_H #include -#include #include #include +#include struct nvgpu_mem; diff --git a/drivers/gpu/nvgpu/common/pmu/therm/therm_channel.h b/drivers/gpu/nvgpu/common/pmu/therm/therm_channel.h index dd2ff2ccb..b710f28ac 100644 --- a/drivers/gpu/nvgpu/common/pmu/therm/therm_channel.h +++ b/drivers/gpu/nvgpu/common/pmu/therm/therm_channel.h @@ -24,8 +24,8 @@ #ifndef NVGPU_THERM_THRMCHANNEL_H #define NVGPU_THERM_THRMCHANNEL_H -#include #include +#include struct therm_channel { struct boardobj super; diff --git a/drivers/gpu/nvgpu/common/pmu/therm/therm_dev.h b/drivers/gpu/nvgpu/common/pmu/therm/therm_dev.h index a4cabfa19..7f3253725 100644 --- a/drivers/gpu/nvgpu/common/pmu/therm/therm_dev.h +++ b/drivers/gpu/nvgpu/common/pmu/therm/therm_dev.h @@ -24,8 +24,8 @@ #ifndef NVGPU_THERM_THRMDEV_H #define NVGPU_THERM_THRMDEV_H -#include #include +#include struct nvgpu_pmu_therm; diff --git a/drivers/gpu/nvgpu/common/pmu/volt/volt.h b/drivers/gpu/nvgpu/common/pmu/volt/volt.h index 25568041d..d1f4a726c 100644 --- a/drivers/gpu/nvgpu/common/pmu/volt/volt.h +++ b/drivers/gpu/nvgpu/common/pmu/volt/volt.h @@ -23,9 +23,8 @@ #ifndef NVGPU_VOLT_H #define NVGPU_VOLT_H -#include -#include #include +#include #define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES 0x04U diff --git a/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h b/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h index ebc7ff631..24795cf41 100644 --- a/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h +++ b/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h @@ -23,8 +23,8 @@ #ifndef NVGPU_VOLT_DEV_H #define NVGPU_VOLT_DEV_H -#include #include +#include #include "ucode_volt_inf.h" diff --git a/drivers/gpu/nvgpu/common/pmu/volt/volt_rail.h b/drivers/gpu/nvgpu/common/pmu/volt/volt_rail.h index 91ec40ce7..1664c0caa 100644 --- a/drivers/gpu/nvgpu/common/pmu/volt/volt_rail.h +++ b/drivers/gpu/nvgpu/common/pmu/volt/volt_rail.h @@ -24,8 +24,8 @@ #ifndef NVGPU_VOLT_RAIL_H #define NVGPU_VOLT_RAIL_H -#include #include +#include #define CTRL_PMGR_PWR_EQUATION_INDEX_INVALID 0xFFU diff --git a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h index 45b8a1f3c..0f842a552 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h +++ b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h @@ -28,11 +28,18 @@ struct gk20a; struct nvgpu_list_node; /* ------------------------ Includes ----------------------------------------*/ -#include #include #include #include #include +#include +/* Dependency of this include will be removed in further CL */ +#include "../../common/pmu/boardobj/boardobj.h" + +struct nv_pmu_boardobjgrp_super; +struct nv_pmu_boardobjgrp; +struct nv_pmu_boardobj; +struct nv_pmu_boardobj_query; /* * Board Object Group Remover and destructor. This is used to remove and @@ -149,7 +156,6 @@ struct boardobjgrp { int (*pmugetstatus)(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrpmask *mask); - int (*pmudatainstget)(struct gk20a *g, struct nv_pmu_boardobjgrp *boardobjgrppmu, struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx); diff --git a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h index abede998a..ee45f71d4 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h +++ b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -39,7 +39,8 @@ struct boardobjgrp_e32 { /* * Statically allocated array of PBOARDOBJ-s */ - struct boardobj *objects[CTRL_BOARDOBJGRP_E32_MAX_OBJECTS]; + /* 32 will be replaced with CTRL_BOARDOBJGRP_E32_MAX_OBJECTS */ + struct boardobj *objects[32]; /* * Statically allocated mask strcuture referenced by super::pMask. diff --git a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrpmask.h b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrpmask.h index 1422dc7e7..98b4c5756 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/boardobjgrpmask.h +++ b/drivers/gpu/nvgpu/include/nvgpu/boardobjgrpmask.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -25,7 +25,6 @@ struct ctrl_boardobjgrp_mask; - /* * Board Object Group Mask super-structure. * Used to unify access to all BOARDOBJGRPMASK_E** child classes @@ -44,7 +43,8 @@ struct boardobjgrpmask { * Start of the array of 32-bit words representing the bit-mask * Must be the last element of the structure. */ - u32 data[CTRL_BOARDOBJGRP_MASK_ARRAY_START_SIZE]; + /* 1 will be replace with CTRL_BOARDOBJGRP_MASK_ARRAY_START_SIZE */ + u32 data[1]; }; struct boardobjgrpmask_e32 { diff --git a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h index ed0091404..b8502c4aa 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h +++ b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h @@ -35,10 +35,12 @@ struct gk20a; #include #include #include -#include #include #include +/* Dependency of this include will be removed in further CL */ +#include "../../common/pmu/boardobj/boardobj.h" + #define MAX_F_POINTS 256 #define DEFAULT_EVENT_NUMBER 32U diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/clk/clk.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/clk/clk.h index dd858bbb9..9fff27d18 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu/clk/clk.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/clk/clk.h @@ -26,10 +26,12 @@ #define NVGPU_PMU_CLK_H #include -#include #include #include +/* Following include will be removed in further CL */ +#include "../../../../common/pmu/boardobj/ucode_boardobj_inf.h" + /*! * Valid global VIN ID values */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h index ab7653c49..258dde2f0 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h @@ -26,7 +26,6 @@ #include #include #include -#include #include #include diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/msg.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/msg.h index 87d186a38..f06a9fb9c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu/msg.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/msg.h @@ -28,7 +28,6 @@ #include #include #include -#include #include /* GPU ID */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlboardobj.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlboardobj.h deleted file mode 100644 index 8a8912d62..000000000 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlboardobj.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifndef NVGPU_PMUIF_CTRLBOARDOBJ_H -#define NVGPU_PMUIF_CTRLBOARDOBJ_H - -#include - -struct ctrl_boardobj { - u8 type; -}; - -#define CTRL_BOARDOBJGRP_TYPE_INVALID 0x00U -#define CTRL_BOARDOBJGRP_TYPE_E32 0x01U -#define CTRL_BOARDOBJGRP_TYPE_E255 0x02U - -#define CTRL_BOARDOBJGRP_E32_MAX_OBJECTS 32U - -#define CTRL_BOARDOBJGRP_E255_MAX_OBJECTS 255U - -#define CTRL_BOARDOBJ_MAX_BOARD_OBJECTS \ - CTRL_BOARDOBJGRP_E32_MAX_OBJECTS - -#define CTRL_BOARDOBJ_IDX_INVALID 255U - -#define CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_BIT_SIZE 32U - -#define CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_INDEX(_bit) \ - ((_bit) / CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_BIT_SIZE) - -#define CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_OFFSET(_bit) \ - ((_bit) % CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_BIT_SIZE) - -#define CTRL_BOARDOBJGRP_MASK_DATA_SIZE(_bits) \ - (CTRL_BOARDOBJGRP_MASK_MASK_ELEMENT_INDEX((_bits) - 1U) + 1U) - - -#define CTRL_BOARDOBJGRP_MASK_ARRAY_START_SIZE 1U -#define CTRL_BOARDOBJGRP_MASK_ARRAY_EXTENSION_SIZE(_bits) \ - (CTRL_BOARDOBJGRP_MASK_DATA_SIZE(_bits) - \ - CTRL_BOARDOBJGRP_MASK_ARRAY_START_SIZE) - -struct ctrl_boardobjgrp_mask { - u32 data[1]; -}; - -struct ctrl_boardobjgrp_mask_e32 { - struct ctrl_boardobjgrp_mask super; -}; - -struct ctrl_boardobjgrp_mask_e255 { - struct ctrl_boardobjgrp_mask super; - u32 data_e255[7]; -}; - -struct ctrl_boardobjgrp_super { - struct ctrl_boardobjgrp_mask obj_mask; -}; - -struct ctrl_boardobjgrp_e32 { - struct ctrl_boardobjgrp_mask_e32 obj_mask; -}; - -struct CTRL_boardobjgrp_e255 { - struct ctrl_boardobjgrp_mask_e255 obj_mask; -}; - -struct ctrl_boardobjgrp { - u32 obj_mask; -}; - -#endif /* NVGPU_PMUIF_CTRLBOARDOBJ_H */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlpmgr.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlpmgr.h index e2953fa1b..7778afea8 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlpmgr.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/ctrlpmgr.h @@ -1,7 +1,7 @@ /* * Control pmgr state infrastructure * - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -24,8 +24,6 @@ #ifndef NVGPU_PMUIF_CTRLPMGR_H #define NVGPU_PMUIF_CTRLPMGR_H -#include "ctrlboardobj.h" - /* valid power domain values */ #define CTRL_PMGR_PWR_DEVICES_MAX_DEVICES 32U #define CTRL_PMGR_PWR_VIOLATION_MAX 0x06U diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/pmgr.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/pmgr.h index e21645e4d..88c3ae1f8 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/pmgr.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/pmgr.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -24,9 +24,9 @@ #define NVGPU_PMUIF_PMGR_H #include +#include "../../../../common/pmu/boardobj/ucode_boardobj_inf.h" #include "ctrlpmgr.h" -#include "boardobj.h" struct nv_pmu_pmgr_i2c_device_desc { struct nv_pmu_boardobj super; diff --git a/drivers/gpu/nvgpu/os/linux/debug_clk_tu104.c b/drivers/gpu/nvgpu/os/linux/debug_clk_tu104.c index 12b69380a..4643f50bb 100644 --- a/drivers/gpu/nvgpu/os/linux/debug_clk_tu104.c +++ b/drivers/gpu/nvgpu/os/linux/debug_clk_tu104.c @@ -19,12 +19,14 @@ #include "os_linux.h" -#include #include #include #include #include +/* Dependency of this include will be removed in further CL */ +#include "../../common/pmu/boardobj/boardobj.h" + #include "hal/clk/clk_tu104.h" void nvgpu_clk_arb_pstate_change_lock(struct gk20a *g, bool lock);