gpu: nvgpu: Fix Unchecked Return Value bugs

Propagate errors from previously unchecked function calls.
This fixes the following Coverity Defects:

nvlink.c : Unchecked return value
sysfs.c : Unchecked return value
nvlink_probe.c : Unchecked return value
ioctl_nvs.c : Unchecked return value

CID 9847567
CID 9848580
CID 10127940
CID 10129447

Bug 3460991
Signed-off-by: Jinesh Parakh <jparakh@nvidia.com>
Change-Id: I930bf34a451d6d941359ad76c84cf1fef2df1351
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2689111
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/os/linux/ioctl_nvs.c

@@ -496,7 +496,10 @@ long nvgpu_nvs_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
 			return -EFAULT;
 	}
 
-	gk20a_busy(g);
+	err = gk20a_busy(g);
+	if (err != 0) {
+		return err;
+	}
 
 	switch (cmd) {
 	case NVGPU_NVS_IOCTL_CREATE_DOMAIN:

drivers/gpu/nvgpu/os/linux/nvlink.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -219,16 +219,24 @@ int nvgpu_nvlink_minion_load_ucode(struct gk20a *g,
 		"  - Ucode Data Size = %u", minion_hdr->ucode_data_size);
 
 	/* Copy Non Secure IMEM code */
-	nvgpu_falcon_copy_to_imem(&g->minion_flcn, 0,
+	err = nvgpu_falcon_copy_to_imem(&g->minion_flcn, 0,
 		(u8 *)&ndev->minion_img[minion_hdr->os_code_offset],
 		minion_hdr->os_code_size, 0, false,
 		GET_IMEM_TAG(minion_hdr->os_code_offset));
 
+	if (err != 0) {
+		goto exit;
+	}
+
 	/* Copy Non Secure DMEM code */
-	nvgpu_falcon_copy_to_dmem(&g->minion_flcn, 0,
+	err = nvgpu_falcon_copy_to_dmem(&g->minion_flcn, 0,
 		(u8 *)&ndev->minion_img[minion_hdr->os_data_offset],
 		minion_hdr->os_data_size, 0);
 
+	if (err != 0) {
+		goto exit;
+	}
+
 	/* Load the apps securely */
 	for (app = 0; app < minion_hdr->num_apps; app++) {
 		u32 app_code_start = minion_hdr->app_code_offsets[app];
@@ -236,20 +244,31 @@ int nvgpu_nvlink_minion_load_ucode(struct gk20a *g,
 		u32 app_data_start = minion_hdr->app_data_offsets[app];
 		u32 app_data_size = minion_hdr->app_data_sizes[app];
 
-		if (app_code_size)
+		if (app_code_size) {
-			nvgpu_falcon_copy_to_imem(&g->minion_flcn,
+			err = nvgpu_falcon_copy_to_imem(&g->minion_flcn,
 				app_code_start,
 				(u8 *)&ndev->minion_img[app_code_start],
 				app_code_size, 0, true,
 				GET_IMEM_TAG(app_code_start));
 
-		if (app_data_size)
+			if (err != 0) {
-			nvgpu_falcon_copy_to_dmem(&g->minion_flcn,
+				goto exit;
+			}
+		}
+
+		if (app_data_size) {
+			err = nvgpu_falcon_copy_to_dmem(&g->minion_flcn,
 				app_data_start,
 				(u8 *)&ndev->minion_img[app_data_start],
 				app_data_size, 0);
+
+			if (err != 0) {
+				goto exit;
+			}
+		}
 	}
 
+exit:
 	return err;
 }
 

drivers/gpu/nvgpu/os/linux/nvlink_probe.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -37,25 +37,48 @@ int nvgpu_nvlink_read_dt_props(struct gk20a *g)
 	u32 remote_dev_id;
 	u32 remote_link_id;
 	bool is_master;
+	int err = 0;
 
 	/* Parse DT */
 	np = nvgpu_get_node(g);
-	if (!np)
+	if (!np) {
+		err = -ENODEV;
 		goto fail;
+	}
 
 	np = of_get_child_by_name(np, "nvidia,nvlink");
-	if (!np)
+	if (!np) {
+		err = -ENODEV;
 		goto fail;
+	}
 
 	np = of_get_child_by_name(np, "endpoint");
-	if (!np)
+	if (!np) {
+		err = -ENODEV;
 		goto fail;
+	}
 
 	/* Parse DT structure to detect endpoint topology */
-	of_property_read_u32(np, "local_dev_id", &local_dev_id);
+	err = of_property_read_u32(np, "local_dev_id", &local_dev_id);
-	of_property_read_u32(np, "local_link_id", &local_link_id);
+	if (err != 0) {
-	of_property_read_u32(np, "remote_dev_id", &remote_dev_id);
+		goto fail;
-	of_property_read_u32(np, "remote_link_id", &remote_link_id);
+	}
+
+	err = of_property_read_u32(np, "local_link_id", &local_link_id);
+	if (err != 0) {
+		goto fail;
+	}
+
+	err = of_property_read_u32(np, "remote_dev_id", &remote_dev_id);
+	if (err != 0) {
+		goto fail;
+	}
+
+	err = of_property_read_u32(np, "remote_link_id", &remote_link_id);
+	if (err != 0) {
+		goto fail;
+	}
+
 	is_master = of_property_read_bool(np, "is_master");
 
 	/* Check that we are in dGPU mode */
@@ -74,7 +97,7 @@ int nvgpu_nvlink_read_dt_props(struct gk20a *g)
 
 fail:
 	nvgpu_info(g, "nvlink endpoint not found or invaling in DT");
-	return -ENODEV;
+	return err;
 }
 
 static int nvgpu_nvlink_ops_early_init(struct nvlink_device *ndev)

drivers/gpu/nvgpu/os/linux/sysfs.c

@@ -588,7 +588,15 @@ static ssize_t mscg_enable_store(struct device *dev,
 				smp_mb();
 				g->mscg_enabled = false;
 				if (nvgpu_pg_elpg_is_enabled(g)) {
-					nvgpu_pg_elpg_enable(g);
+					err = nvgpu_pg_elpg_enable(g);
+					if (err) {
+						WRITE_ONCE(pmu->pg->mscg_stat, PMU_MSCG_ENABLED);
+						/* make status visible */
+						smp_mb();
+						g->mscg_enabled = true;
+						gk20a_idle(g);
+						return err;
+					}
 				}
 			}
 			g->mscg_enabled = false;