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gpu: nvgpu: remove use of linux specific powergate_mode flag

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In dbg_set_powergate(), we use flags NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE/ENABLE
which are defined in linux specific uapi header
Hence we need to remove those flags from common code

Update dbg_set_powergate() to receive boolean flag to disable/enable powergate
instead of NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE/ENABLE

Also update corresponding HALs as per above change

Jira NVGPU-259

Change-Id: I9c4eb30e29ea5ce0d8e25517a6a072fb9f0e92e5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1594326
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2017-11-08 02:59:31 -08:00
committed by mobile promotions
parent 86a307871b
commit 02d281d077
6 changed files with 27 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/gpu/nvgpu/common/linux/ioctl_dbg.c
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@@ -178,8 +178,7 @@ int gk20a_dbg_gpu_dev_release(struct inode *inode, struct file *filp)
* calling powergate/timeout enable ioctl * calling powergate/timeout enable ioctl
*/ */
nvgpu_mutex_acquire(&g->dbg_sessions_lock); nvgpu_mutex_acquire(&g->dbg_sessions_lock);
g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, false);
NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE);
nvgpu_dbg_timeout_enable(dbg_s, NVGPU_DBG_GPU_IOCTL_TIMEOUT_ENABLE); nvgpu_dbg_timeout_enable(dbg_s, NVGPU_DBG_GPU_IOCTL_TIMEOUT_ENABLE);
/* If this session owned the perf buffer, release it */ /* If this session owned the perf buffer, release it */
@@ -651,7 +650,7 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
* disabling/enabling powergating when processing reg ops * disabling/enabling powergating when processing reg ops
*/ */
powergate_err = g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, powergate_err = g->ops.dbg_session_ops.dbg_set_powergate(dbg_s,
NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE); true);
is_pg_disabled = true; is_pg_disabled = true;
} }
@@ -701,7 +700,7 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
if (is_pg_disabled) { if (is_pg_disabled) {
powergate_err = powergate_err =
g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, g->ops.dbg_session_ops.dbg_set_powergate(dbg_s,
NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE); false);
} }
} }
@@ -725,7 +724,14 @@ static int nvgpu_ioctl_powergate_gk20a(struct dbg_session_gk20a *dbg_s,
g->name, args->mode); g->name, args->mode);
nvgpu_mutex_acquire(&g->dbg_sessions_lock); nvgpu_mutex_acquire(&g->dbg_sessions_lock);
err = g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, args->mode); if (args->mode == NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE) {
err = g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, true);
} else if (args->mode == NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE) {
err = g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, false);
} else {
nvgpu_err(g, "invalid powergate mode");
err = -EINVAL;
}
nvgpu_mutex_release(&g->dbg_sessions_lock); nvgpu_mutex_release(&g->dbg_sessions_lock);
return err; return err;
} }

25
drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
View File

@@ -144,17 +144,16 @@ int gk20a_dbg_gpu_clear_broadcast_stop_trigger(struct channel_gk20a *ch)
return 0; return 0;
} }
int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode) int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, bool disable_powergate)
{ {
int err = 0; int err = 0;
struct gk20a *g = dbg_s->g; struct gk20a *g = dbg_s->g;
/* This function must be called with g->dbg_sessions_lock held */ /* This function must be called with g->dbg_sessions_lock held */
nvgpu_log(g, gpu_dbg_fn|gpu_dbg_gpu_dbg, "%s powergate mode = %d", nvgpu_log(g, gpu_dbg_fn|gpu_dbg_gpu_dbg, "%s powergate mode = %s",
g->name, powermode); g->name, disable_powergate ? "disable" : "enable");
switch (powermode) {
/* /*
* Powergate mode here refers to railgate+powergate+clockgate * Powergate mode here refers to railgate+powergate+clockgate
* so in case slcg/blcg/elcg are disabled and railgating is enabled, * so in case slcg/blcg/elcg are disabled and railgating is enabled,
@@ -162,7 +161,7 @@ int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode)
* Similarly re-enable railgating and not other features if they are not * Similarly re-enable railgating and not other features if they are not
* enabled when powermode=MODE_ENABLE * enabled when powermode=MODE_ENABLE
*/ */
case NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE: if (disable_powergate) {
/* save off current powergate, clk state. /* save off current powergate, clk state.
* set gpu module's can_powergate = 0. * set gpu module's can_powergate = 0.
* set gpu module's clk to max. * set gpu module's clk to max.
@@ -202,9 +201,7 @@ int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode)
} }
dbg_s->is_pg_disabled = true; dbg_s->is_pg_disabled = true;
break; } else {
case NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE:
/* restore (can) powergate, clk state */ /* restore (can) powergate, clk state */
/* release pending exceptions to fault/be handled as usual */ /* release pending exceptions to fault/be handled as usual */
/*TBD: ordering of these? */ /*TBD: ordering of these? */
@@ -247,18 +244,10 @@ int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode)
} }
dbg_s->is_pg_disabled = false; dbg_s->is_pg_disabled = false;
break;
default:
nvgpu_err(g,
"unrecognized dbg gpu powergate mode: 0x%x",
powermode);
err = -ENOTTY;
break;
} }
nvgpu_log(g, gpu_dbg_fn|gpu_dbg_gpu_dbg, "%s powergate mode = %d done", nvgpu_log(g, gpu_dbg_fn|gpu_dbg_gpu_dbg, "%s powergate mode = %s done",
g->name, powermode); g->name, disable_powergate ? "disable" : "enable");
return err; return err;
} }

2
drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.h
View File

@@ -120,7 +120,7 @@ dbg_profiler_object_data_from_prof_obj_entry(struct nvgpu_list_node *node)
bool gk20a_dbg_gpu_broadcast_stop_trigger(struct channel_gk20a *ch); bool gk20a_dbg_gpu_broadcast_stop_trigger(struct channel_gk20a *ch);
int gk20a_dbg_gpu_clear_broadcast_stop_trigger(struct channel_gk20a *ch); int gk20a_dbg_gpu_clear_broadcast_stop_trigger(struct channel_gk20a *ch);
int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode); int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, bool disable_powergate);
bool nvgpu_check_and_set_global_reservation( bool nvgpu_check_and_set_global_reservation(
struct dbg_session_gk20a *dbg_s, struct dbg_session_gk20a *dbg_s,
struct dbg_profiler_object_data *prof_obj); struct dbg_profiler_object_data *prof_obj);

2
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -947,7 +947,7 @@ struct gpu_ops {
struct nvgpu_dbg_gpu_reg_op *ops, struct nvgpu_dbg_gpu_reg_op *ops,
u64 num_ops); u64 num_ops);
int (*dbg_set_powergate)(struct dbg_session_gk20a *dbg_s, int (*dbg_set_powergate)(struct dbg_session_gk20a *dbg_s,
u32 mode); bool disable_powergate);
bool (*check_and_set_global_reservation)( bool (*check_and_set_global_reservation)(
struct dbg_session_gk20a *dbg_s, struct dbg_session_gk20a *dbg_s,
struct dbg_profiler_object_data *prof_obj); struct dbg_profiler_object_data *prof_obj);

14
drivers/gpu/nvgpu/vgpu/dbg_vgpu.c
View File

@@ -77,28 +77,26 @@ fail:
return err; return err;
} }
int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, __u32 mode) int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, bool disable_powergate)
{ {
struct tegra_vgpu_cmd_msg msg; struct tegra_vgpu_cmd_msg msg;
struct tegra_vgpu_set_powergate_params *p = &msg.params.set_powergate; struct tegra_vgpu_set_powergate_params *p = &msg.params.set_powergate;
int err = 0; int err = 0;
u32 mode;
gk20a_dbg_fn(""); gk20a_dbg_fn("");
/* Just return if requested mode is the same as the session's mode */ /* Just return if requested mode is the same as the session's mode */
switch (mode) { if (disable_powergate) {
case NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE:
if (dbg_s->is_pg_disabled) if (dbg_s->is_pg_disabled)
return 0; return 0;
dbg_s->is_pg_disabled = true; dbg_s->is_pg_disabled = true;
break; mode = NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE;
case NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE: } else {
if (!dbg_s->is_pg_disabled) if (!dbg_s->is_pg_disabled)
return 0; return 0;
dbg_s->is_pg_disabled = false; dbg_s->is_pg_disabled = false;
break; mode = NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE;
default:
return -EINVAL;
} }
msg.cmd = TEGRA_VGPU_CMD_SET_POWERGATE; msg.cmd = TEGRA_VGPU_CMD_SET_POWERGATE;

2
drivers/gpu/nvgpu/vgpu/dbg_vgpu.h
View File

@@ -31,7 +31,7 @@ struct gk20a;
int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s, int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s,
struct nvgpu_dbg_gpu_reg_op *ops, struct nvgpu_dbg_gpu_reg_op *ops,
u64 num_ops); u64 num_ops);
int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, __u32 mode); int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, bool disable_powergate);
bool vgpu_check_and_set_global_reservation( bool vgpu_check_and_set_global_reservation(
struct dbg_session_gk20a *dbg_s, struct dbg_session_gk20a *dbg_s,
struct dbg_profiler_object_data *prof_obj); struct dbg_profiler_object_data *prof_obj);