gpu: nvgpu: vgpu: create vgpu_common file

vgpu_common file contains common functions that could be shared by
legacy vgpu and vf.

Jira GVSCI-15779

Change-Id: Ie301eb29dfceed95bcd96a1024663f31eb7558fd
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2884175
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/Makefile

@@ -622,6 +622,7 @@ nvgpu-$(CONFIG_TEGRA_GK20A_NVHOST) += \
 nvgpu-$(CONFIG_NVGPU_GR_VIRTUALIZATION) += \
 	os/linux/vgpu/platform_vgpu_tegra.o \
 	os/linux/vgpu/sysfs_vgpu.o \
+	os/linux/vgpu/vgpu_common.o \
 	os/linux/vgpu/vgpu_ivc.o \
 	os/linux/vgpu/vgpu_linux.o \
 	os/linux/vgpu/gv11b/platform_gv11b_vgpu_tegra.o

drivers/gpu/nvgpu/os/linux/module.c

@@ -75,6 +75,7 @@
 #include "common/gr/gr_priv.h"
 #include "platform_gk20a.h"
 #include "sysfs.h"
+#include "vgpu/vgpu_common.h"
 #include "vgpu/vgpu_linux.h"
 #include "scale.h"
 #include "pci.h"

drivers/gpu/nvgpu/os/linux/vgpu/vgpu_common.c

@@ -0,0 +1,343 @@
+/*
+ * Linux common code for legacy VGPU and VF
+ *
+ * Copyright (c) 2023, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/dma-mapping.h>
+#ifdef CONFIG_NVGPU_TEGRA_FUSE
+#include <soc/tegra/fuse.h>
+#endif
+
+#include <nvgpu/cic_rm.h>
+#include <nvgpu/defaults.h>
+#include <nvgpu/errata.h>
+#include <nvgpu/nvgpu_init.h>
+#include <nvgpu/regops.h>
+#include <nvgpu/soc.h>
+
+#include "vgpu_linux.h"
+#include "common/vgpu/ivc/comm_vgpu.h"
+#include "common/vgpu/init/init_vgpu.h"
+#include "common/vgpu/intr/intr_vgpu.h"
+
+#include "os/linux/module.h"
+#include "os/linux/os_linux.h"
+#include "os/linux/ioctl.h"
+#include "os/linux/driver_common.h"
+#include "os/linux/platform_gk20a.h"
+
+#include "vgpu_common.h"
+
+struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g)
+{
+	struct gk20a_platform *plat = gk20a_get_platform(dev_from_gk20a(g));
+
+	return (struct vgpu_priv_data *)plat->vgpu_priv;
+}
+
+static void vgpu_init_vars(struct gk20a *g, struct gk20a_platform *platform)
+{
+	struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
+	struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
+
+	nvgpu_spinlock_init(&g->power_spinlock);
+
+	nvgpu_mutex_init(&g->power_lock);
+	nvgpu_mutex_init(&g->clk_arb_enable_lock);
+	nvgpu_mutex_init(&g->cg_pg_lock);
+	nvgpu_rwsem_init(&g->deterministic_busy);
+	nvgpu_rwsem_init(&(g->ipa_pa_cache.ipa_pa_rw_lock));
+
+	nvgpu_mutex_init(&priv->vgpu_clk_get_freq_lock);
+
+	nvgpu_mutex_init(&l->ctrl_privs_lock);
+	nvgpu_init_list_node(&l->ctrl_privs);
+
+	g->regs_saved = g->regs;
+
+	nvgpu_atomic_set(&g->clk_arb_global_nr, 0);
+
+	g->aggressive_sync_destroy_thresh = platform->aggressive_sync_destroy_thresh;
+	nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, platform->has_syncpoints);
+	g->ptimer_src_freq = platform->ptimer_src_freq;
+	nvgpu_set_enabled(g, NVGPU_CAN_RAILGATE, platform->can_railgate_init);
+	g->railgate_delay = platform->railgate_delay_init;
+
+	g->mm.disable_bigpage = NVGPU_CPU_PAGE_SIZE < SZ_64K;
+	nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY,
+			    platform->unified_memory);
+	nvgpu_set_enabled(g, NVGPU_MM_UNIFY_ADDRESS_SPACES,
+			    platform->unify_address_spaces);
+
+	if (nvgpu_is_vf(g)) {
+		/* only VF needs IPA2PA */
+		nvgpu_init_soc_vars(g);
+	}
+}
+
+static int vgpu_init_support(struct gk20a *g)
+{
+	int err = 0;
+
+	nvgpu_mutex_init(&g->dbg_sessions_lock);
+#if defined(CONFIG_NVGPU_CYCLESTATS)
+	nvgpu_mutex_init(&g->cs_lock);
+#endif
+#ifdef CONFIG_NVGPU_TSG_SHARING
+	nvgpu_mutex_init(&g->ctrl_dev_id_lock);
+#endif
+	nvgpu_init_list_node(&g->profiler_objects);
+
+#ifdef CONFIG_NVGPU_DEBUGGER
+	g->dbg_regops_tmp_buf = nvgpu_kzalloc(g, SZ_4K);
+	if (!g->dbg_regops_tmp_buf) {
+		nvgpu_err(g, "couldn't allocate regops tmp buf");
+		err = -ENOMEM;
+		goto fail;
+	}
+	g->dbg_regops_tmp_buf_ops =
+		SZ_4K / sizeof(g->dbg_regops_tmp_buf[0]);
+#endif
+
+	g->remove_support = vgpu_remove_support_common;
+	return 0;
+
+ fail:
+	vgpu_remove_support_common(g);
+	return err;
+}
+
+int vgpu_pm_prepare_poweroff(struct device *dev)
+{
+	struct gk20a *g = get_gk20a(dev);
+	int ret = 0;
+
+	nvgpu_log_fn(g, " ");
+
+	nvgpu_mutex_acquire(&g->power_lock);
+
+	if (nvgpu_is_powered_off(g))
+		goto done;
+
+	if (g->ops.channel.suspend_all_serviceable_ch != NULL) {
+		ret = g->ops.channel.suspend_all_serviceable_ch(g);
+	}
+
+	if (ret != 0) {
+		goto done;
+	}
+
+	nvgpu_set_power_state(g, NVGPU_STATE_POWERED_OFF);
+
+ done:
+	nvgpu_mutex_release(&g->power_lock);
+
+	return ret;
+}
+
+int vgpu_pm_finalize_poweron(struct device *dev)
+{
+	struct gk20a *g = get_gk20a(dev);
+	struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
+	int err = 0;
+
+	nvgpu_log_fn(g, " ");
+
+	nvgpu_mutex_acquire(&g->power_lock);
+
+	if (nvgpu_is_powered_on(g))
+		goto done;
+
+	nvgpu_set_power_state(g, NVGPU_STATE_POWERING_ON);
+
+	err = vgpu_finalize_poweron_common(g);
+	if (err)
+		goto done;
+
+	if (!l->dev_nodes_created) {
+		err = gk20a_user_nodes_init(dev);
+		if (err) {
+			goto done;
+		}
+
+		l->dev_nodes_created = true;
+	}
+
+	/* Initialize linux specific flags */
+	gk20a_init_linux_characteristics(g);
+
+	err = nvgpu_finalize_poweron_linux(l);
+	if (err)
+		goto done;
+
+	gk20a_sched_ctrl_init(g);
+
+	g->sw_ready = true;
+
+	nvgpu_set_power_state(g, NVGPU_STATE_POWERED_ON);
+
+done:
+	nvgpu_mutex_release(&g->power_lock);
+	return err;
+}
+
+int vgpu_probe_common(struct nvgpu_os_linux *l)
+{
+	struct gk20a *g = &l->g;
+	struct device *dev = l->dev;
+	struct gk20a_platform *platform = gk20a_get_platform(dev);
+	struct vgpu_priv_data *priv;
+	int err;
+
+	nvgpu_log_fn(g, " ");
+
+	nvgpu_init_gk20a(g);
+
+	nvgpu_kmem_init(g);
+
+	err = nvgpu_init_errata_flags(g);
+	if (err) {
+		return err;
+	}
+
+	err = nvgpu_init_enabled_flags(g);
+	if (err) {
+		goto free_errata;
+	}
+
+	#ifdef CONFIG_NVGPU_TEGRA_FUSE
+	if (tegra_platform_is_vdk())
+		nvgpu_set_enabled(g, NVGPU_IS_FMODEL, true);
+#endif
+
+	g->is_virtual = true;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv) {
+		err = -ENOMEM;
+		goto free_errata;
+	}
+
+	platform->g = g;
+	platform->vgpu_priv = priv;
+
+	err = vgpu_init_support(g);
+	if (err != 0) {
+		goto free_errata;
+	}
+
+	err = nvgpu_cic_rm_setup(g);
+	if (err != 0) {
+		nvgpu_err(g, "CIC-RM setup failed");
+		goto free_errata;
+	}
+
+	err = nvgpu_cic_rm_init_vars(g);
+	if (err != 0) {
+		nvgpu_err(g, "CIC-RM init vars failed");
+		goto remove_cic;
+	}
+
+	nvgpu_read_support_gpu_tools(g);
+
+	vgpu_init_vars(g, platform);
+
+	init_rwsem(&l->busy_lock);
+
+	nvgpu_spinlock_init(&g->mc.enable_lock);
+
+	nvgpu_spinlock_init(&g->mc.intr_lock);
+
+	g->ch_wdt_init_limit_ms = platform->ch_wdt_init_limit_ms;
+
+	/* Initialize the platform interface. */
+	err = platform->probe(dev);
+	if (err) {
+		if (err == -EPROBE_DEFER)
+			nvgpu_info(g, "platform probe failed");
+		else
+			nvgpu_err(g, "platform probe failed");
+		goto remove_cic;
+	}
+
+	if (platform->late_probe) {
+		err = platform->late_probe(dev);
+		if (err) {
+			nvgpu_err(g, "late probe failed");
+			goto remove_cic;
+		}
+	}
+
+	err = gk20a_power_node_init(dev);
+	if (err) {
+		nvgpu_err(g, "power_node creation failed");
+		goto remove_cic;
+	}
+
+	err = vgpu_comm_init(g);
+	if (err) {
+		nvgpu_err(g, "failed to init comm interface");
+		goto remove_cic;
+	}
+
+	priv->virt_handle = vgpu_connect();
+	if (!priv->virt_handle) {
+		nvgpu_err(g, "failed to connect to server node");
+		goto comm_deinit;
+	}
+
+	err = vgpu_get_constants(g);
+	if (err) {
+		goto comm_deinit;
+	}
+
+	gk20a_debug_init(g, "gpu.0");
+
+	/* Set DMA parameters to allow larger sgt lists */
+	dev->dma_parms = &l->dma_parms;
+	dma_set_max_seg_size(dev, UINT_MAX);
+
+	dma_set_mask(dev, platform->dma_mask);
+	dma_set_coherent_mask(dev, platform->dma_mask);
+	dma_set_seg_boundary(dev, platform->dma_mask);
+
+	g->poll_timeout_default = NVGPU_DEFAULT_POLL_TIMEOUT_MS;
+	g->timeouts_disabled_by_user = false;
+	nvgpu_atomic_set(&g->timeouts_disabled_refcount, 0);
+	g->tsg_dbg_timeslice_max_us = NVGPU_TSG_DBG_TIMESLICE_MAX_US_DEFAULT;
+
+	nvgpu_mutex_init(&l->dmabuf_priv_list_lock);
+	nvgpu_init_list_node(&l->dmabuf_priv_list);
+
+	nvgpu_ref_init(&g->refcount);
+
+	priv = platform->vgpu_priv;
+	err = nvgpu_thread_create(&priv->intr_handler, g,
+			vgpu_intr_thread, "gk20a");
+	if (err) {
+		goto comm_deinit;
+	}
+
+	return 0;
+
+comm_deinit:
+	vgpu_comm_deinit();
+remove_cic:
+	(void) nvgpu_cic_rm_remove(g);
+free_errata:
+	nvgpu_free_errata_flags(g);
+	return err;
+}

drivers/gpu/nvgpu/os/linux/vgpu/vgpu_common.h

@@ -0,0 +1,42 @@
+/*
+  * Copyright (c) 2023, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LINUX_VGPU_COMMON_H
+#define LINUX_VGPU_COMMON_H
+
+struct device;
+struct nvgpu_os_linux;
+
+#ifdef CONFIG_NVGPU_GR_VIRTUALIZATION
+
+int vgpu_pm_prepare_poweroff(struct device *dev);
+int vgpu_pm_finalize_poweron(struct device *dev);
+int vgpu_probe_common(struct nvgpu_os_linux *l);
+
+#else
+
+static inline int vgpu_pm_prepare_poweroff(struct device *dev)
+{
+	return -ENOSYS;
+}
+static inline int vgpu_pm_finalize_poweron(struct device *dev)
+{
+	return -ENOSYS;
+}
+
+#endif
+
+#endif

drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c

@@ -16,207 +16,26 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/dma-mapping.h>
 #include <linux/pm_runtime.h>
-#include <linux/pm_qos.h>
 #include <linux/platform_device.h>
 #ifdef CONFIG_NVGPU_TEGRA_FUSE
 #include <linux/version.h>
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0)
-#include <soc/tegra/chip-id.h>
-#else
-#include <soc/tegra/fuse.h>
-#endif
 #endif
 
-#include <nvgpu/kmem.h>
-#include <nvgpu/bug.h>
-#include <nvgpu/enabled.h>
-#include <nvgpu/errata.h>
-#include <nvgpu/debug.h>
 #include <nvgpu/soc.h>
-#include <nvgpu/defaults.h>
-#include <nvgpu/ltc.h>
-#include <nvgpu/channel.h>
-#include <nvgpu/tsg.h>
-#include <nvgpu/regops.h>
-#include <nvgpu/clk_arb.h>
-#include <nvgpu/gr/gr.h>
 #include <nvgpu/nvgpu_init.h>
-#include <nvgpu/cic_rm.h>
-
-#include <nvgpu/vgpu/os_init_hal_vgpu.h>
 
 #include "vgpu_linux.h"
-#include "common/vgpu/gr/fecs_trace_vgpu.h"
-#include "common/vgpu/clk_vgpu.h"
 #include "common/vgpu/ivc/comm_vgpu.h"
 #include "common/vgpu/intr/intr_vgpu.h"
-#include "common/vgpu/init/init_vgpu.h"
 
-#include "os/linux/module.h"
 #include "os/linux/os_linux.h"
 #include "os/linux/ioctl.h"
 #include "os/linux/scale.h"
-#include "os/linux/driver_common.h"
 #include "os/linux/platform_gk20a.h"
-#include "os/linux/vgpu/platform_vgpu_tegra.h"
 #include "os/linux/dmabuf_priv.h"
 
-struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g)
-{
-	struct gk20a_platform *plat = gk20a_get_platform(dev_from_gk20a(g));
-
-	return (struct vgpu_priv_data *)plat->vgpu_priv;
-}
-
-static void vgpu_init_vars(struct gk20a *g, struct gk20a_platform *platform)
-{
-	struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
-	struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
-
-	nvgpu_spinlock_init(&g->power_spinlock);
-
-	nvgpu_mutex_init(&g->power_lock);
-	nvgpu_mutex_init(&g->clk_arb_enable_lock);
-	nvgpu_mutex_init(&g->cg_pg_lock);
-	nvgpu_rwsem_init(&g->deterministic_busy);
-	nvgpu_rwsem_init(&(g->ipa_pa_cache.ipa_pa_rw_lock));
-
-	nvgpu_mutex_init(&priv->vgpu_clk_get_freq_lock);
-
-	nvgpu_mutex_init(&l->ctrl_privs_lock);
-	nvgpu_init_list_node(&l->ctrl_privs);
-
-	g->regs_saved = g->regs;
-
-	nvgpu_atomic_set(&g->clk_arb_global_nr, 0);
-
-	g->aggressive_sync_destroy_thresh = platform->aggressive_sync_destroy_thresh;
-	nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, platform->has_syncpoints);
-	g->ptimer_src_freq = platform->ptimer_src_freq;
-	nvgpu_set_enabled(g, NVGPU_CAN_RAILGATE, platform->can_railgate_init);
-	g->railgate_delay = platform->railgate_delay_init;
-
-	g->mm.disable_bigpage = NVGPU_CPU_PAGE_SIZE < SZ_64K;
-	nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY,
-			    platform->unified_memory);
-	nvgpu_set_enabled(g, NVGPU_MM_UNIFY_ADDRESS_SPACES,
-			    platform->unify_address_spaces);
-
-	if (nvgpu_is_vf(g)) {
-		/* only VF needs IPA2PA */
-		nvgpu_init_soc_vars(g);
-	}
-}
-
-static int vgpu_init_support(struct gk20a *g)
-{
-	struct gk20a *g = get_gk20a(&pdev->dev);
-	int err = 0;
-
-	nvgpu_mutex_init(&g->dbg_sessions_lock);
-#if defined(CONFIG_NVGPU_CYCLESTATS)
-	nvgpu_mutex_init(&g->cs_lock);
-#endif
-#ifdef CONFIG_NVGPU_TSG_SHARING
-	nvgpu_mutex_init(&g->ctrl_dev_id_lock);
-#endif
-	nvgpu_init_list_node(&g->profiler_objects);
-
-#ifdef CONFIG_NVGPU_DEBUGGER
-	g->dbg_regops_tmp_buf = nvgpu_kzalloc(g, SZ_4K);
-	if (!g->dbg_regops_tmp_buf) {
-		nvgpu_err(g, "couldn't allocate regops tmp buf");
-		err = -ENOMEM;
-	}
-	g->dbg_regops_tmp_buf_ops =
-		SZ_4K / sizeof(g->dbg_regops_tmp_buf[0]);
-#endif
-
-	g->remove_support = vgpu_remove_support_common;
-	return 0;
-
- fail:
-	vgpu_remove_support_common(g);
-	return err;
-}
-
-int vgpu_pm_prepare_poweroff(struct device *dev)
-{
-	struct gk20a *g = get_gk20a(dev);
-	int ret = 0;
-
-	nvgpu_log_fn(g, " ");
-
-	nvgpu_mutex_acquire(&g->power_lock);
-
-	if (nvgpu_is_powered_off(g))
-		goto done;
-
-	if (g->ops.channel.suspend_all_serviceable_ch != NULL) {
-		ret = g->ops.channel.suspend_all_serviceable_ch(g);
-	}
-
-	if (ret != 0) {
-		goto done;
-	}
-
-	nvgpu_set_power_state(g, NVGPU_STATE_POWERED_OFF);
-
- done:
-	nvgpu_mutex_release(&g->power_lock);
-
-	return ret;
-}
-
-int vgpu_pm_finalize_poweron(struct device *dev)
-{
-	struct gk20a *g = get_gk20a(dev);
-	struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
-	int err = 0;
-
-	nvgpu_log_fn(g, " ");
-
-	nvgpu_mutex_acquire(&g->power_lock);
-
-	if (nvgpu_is_powered_on(g))
-		goto done;
-
-	nvgpu_set_power_state(g, NVGPU_STATE_POWERING_ON);
-
-	err = vgpu_finalize_poweron_common(g);
-	if (err)
-		goto done;
-
-	if (!l->dev_nodes_created) {
-		err = gk20a_user_nodes_init(dev);
-		if (err) {
-			goto done;
-		}
-
-		l->dev_nodes_created = true;
-	}
-
-	/* Initialize linux specific flags */
-	gk20a_init_linux_characteristics(g);
-
-	err = nvgpu_finalize_poweron_linux(l);
-	if (err)
-		goto done;
-
-	gk20a_sched_ctrl_init(g);
-
-	g->sw_ready = true;
-
-	nvgpu_set_power_state(g, NVGPU_STATE_POWERED_ON);
-
-done:
-	nvgpu_mutex_release(&g->power_lock);
-	return err;
-}
+#include "vgpu_common.h"
 
 #ifdef CONFIG_GK20A_PM_QOS
 
@@ -310,14 +129,13 @@ int vgpu_probe(struct platform_device *pdev)
 	int err;
 	struct device *dev = &pdev->dev;
 	struct gk20a_platform *platform = gk20a_get_platform(dev);
-	struct vgpu_priv_data *priv;
 
 	if (!platform) {
 		dev_err(dev, "no platform data\n");
 		return -ENODATA;
 	}
 
-	l = kzalloc(sizeof(*l), GFP_KERNEL);
+	l = devm_kzalloc(dev, sizeof(*l), GFP_KERNEL);
 	if (!l) {
 		dev_err(dev, "couldn't allocate gk20a support");
 		return -ENOMEM;
@@ -327,111 +145,18 @@ int vgpu_probe(struct platform_device *pdev)
 
 	nvgpu_log_fn(gk20a, " ");
 
-	nvgpu_init_gk20a(gk20a);
-
-	nvgpu_kmem_init(gk20a);
-
-	err = nvgpu_init_errata_flags(gk20a);
-	if (err) {
-		kfree(gk20a);
-		return err;
-	}
-
-	err = nvgpu_init_enabled_flags(gk20a);
-	if (err) {
-		nvgpu_free_errata_flags(gk20a);
-		kfree(gk20a);
-		return err;
-	}
-
 	l->dev = dev;
-#ifdef CONFIG_NVGPU_TEGRA_FUSE
-	if (tegra_platform_is_vdk())
-		nvgpu_set_enabled(gk20a, NVGPU_IS_FMODEL, true);
-#endif
 
-	gk20a->is_virtual = true;
+	/*
+	 * A default of 16GB is the largest supported DMA size that is
+	 * acceptable to all currently supported Tegra SoCs.
+	 */
+	if (!platform->dma_mask)
+		platform->dma_mask = DMA_BIT_MASK(34);
 
-	priv = nvgpu_kzalloc(gk20a, sizeof(*priv));
-	if (!priv) {
-		kfree(gk20a);
-		return -ENOMEM;
-	}
-
-	platform->g = gk20a;
-	platform->vgpu_priv = priv;
-
-	err = vgpu_init_support(gk20a);
-	if (err != 0) {
-		kfree(l);
-		return -ENOMEM;
-	}
-
-	err = nvgpu_cic_rm_setup(gk20a);
-	if (err != 0) {
-		nvgpu_err(gk20a, "CIC-RM setup failed");
-		return err;
-	}
-
-	err = nvgpu_cic_rm_init_vars(gk20a);
-	if (err != 0) {
-		nvgpu_err(gk20a, "CIC-RM init vars failed");
-		(void) nvgpu_cic_rm_remove(gk20a);
-		return err;
-	}
-
-	nvgpu_read_support_gpu_tools(gk20a);
-
-	vgpu_init_vars(gk20a, platform);
-
-	init_rwsem(&l->busy_lock);
-
-	nvgpu_spinlock_init(&gk20a->mc.enable_lock);
-
-	nvgpu_spinlock_init(&gk20a->mc.intr_lock);
-
-	gk20a->ch_wdt_init_limit_ms = platform->ch_wdt_init_limit_ms;
-
-	/* Initialize the platform interface. */
-	err = platform->probe(dev);
+	err = vgpu_probe_common(l);
 	if (err) {
-		if (err == -EPROBE_DEFER)
-			nvgpu_info(gk20a, "platform probe failed");
-		else
-			nvgpu_err(gk20a, "platform probe failed");
-		return err;
-	}
-
-	if (platform->late_probe) {
-		err = platform->late_probe(dev);
-		if (err) {
-			nvgpu_err(gk20a, "late probe failed");
-			return err;
-		}
-	}
-
-	err = gk20a_power_node_init(dev);
-	if (err) {
-		nvgpu_err(gk20a, "power_node creation failed");
-		return err;
-	}
-
-	err = vgpu_comm_init(gk20a);
-	if (err) {
-		nvgpu_err(gk20a, "failed to init comm interface");
-		return -ENOSYS;
-	}
-
-	priv->virt_handle = vgpu_connect();
-	if (!priv->virt_handle) {
-		nvgpu_err(gk20a, "failed to connect to server node");
-		vgpu_comm_deinit();
-		return -ENOSYS;
-	}
-
-	err = vgpu_get_constants(gk20a);
-	if (err) {
-		vgpu_comm_deinit();
+		nvgpu_err(gk20a, "common probe failed, err=%d", err);
 		return err;
 	}
 
@@ -441,33 +166,6 @@ int vgpu_probe(struct platform_device *pdev)
 		return err;
 	}
 
-	err = nvgpu_thread_create(&priv->intr_handler, gk20a,
-			vgpu_intr_thread, "gk20a");
-	if (err) {
-		return err;
-	}
-
-	gk20a_debug_init(gk20a, "gpu.0");
-
-	/* Set DMA parameters to allow larger sgt lists */
-	dev->dma_parms = &l->dma_parms;
-	dma_set_max_seg_size(dev, UINT_MAX);
-
-	/*
-	 * A default of 16GB is the largest supported DMA size that is
-	 * acceptable to all currently supported Tegra SoCs.
-	 */
-	if (!platform->dma_mask)
-		platform->dma_mask = DMA_BIT_MASK(34);
-
-	dma_set_mask(dev, platform->dma_mask);
-	dma_set_coherent_mask(dev, platform->dma_mask);
-	dma_set_seg_boundary(dev, platform->dma_mask);
-
-	gk20a->poll_timeout_default = NVGPU_DEFAULT_POLL_TIMEOUT_MS;
-	gk20a->timeouts_disabled_by_user = false;
-	nvgpu_atomic_set(&gk20a->timeouts_disabled_refcount, 0);
-	gk20a->tsg_dbg_timeslice_max_us = NVGPU_TSG_DBG_TIMESLICE_MAX_US_DEFAULT;
 	vgpu_create_sysfs(dev);
 
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)
@@ -479,11 +177,6 @@ int vgpu_probe(struct platform_device *pdev)
 	gk20a->max_comptag_mem = totalram_size_in_mb;
 #endif
 
-	nvgpu_mutex_init(&l->dmabuf_priv_list_lock);
-	nvgpu_init_list_node(&l->dmabuf_priv_list);
-
-	nvgpu_ref_init(&gk20a->refcount);
-
 	return 0;
 }
 

drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.h

@@ -26,8 +26,6 @@ struct platform_device;
 
 #include <nvgpu/vgpu/vgpu.h>
 
-int vgpu_pm_prepare_poweroff(struct device *dev);
-int vgpu_pm_finalize_poweron(struct device *dev);
 int vgpu_probe(struct platform_device *dev);
 int vgpu_remove(struct platform_device *dev);
 
@@ -39,14 +37,6 @@ int vgpu_tegra_resume(struct device *dev);
 #else
 /* define placeholders for functions used outside of vgpu */
 
-static inline int vgpu_pm_prepare_poweroff(struct device *dev)
-{
-	return -ENOSYS;
-}
-static inline int vgpu_pm_finalize_poweron(struct device *dev)
-{
-	return -ENOSYS;
-}
 static inline int vgpu_probe(struct platform_device *dev)
 {
 	return -ENOSYS;