mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-23 18:16:01 +03:00
gpu: nvgpu: set set_sm_debug_mode() for gm20b
Set function pointer gops->gr.set_sm_debug_mode() for gm20b Bug 200168107 Change-Id: I40eebbc55b0f82f793fcea90245ae6dad0f5779c Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/935773 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
committed by
Terje Bergstrom
parent
c43053761b
commit
04092f74bb
@@ -7423,7 +7423,7 @@ static void gr_gk20a_init_cyclestats(struct gk20a *g)
|
||||
#endif
|
||||
}
|
||||
|
||||
static int gr_gk20a_set_sm_debug_mode(struct gk20a *g,
|
||||
int gr_gk20a_set_sm_debug_mode(struct gk20a *g,
|
||||
struct channel_gk20a *ch, u64 sms, bool enable)
|
||||
{
|
||||
struct nvgpu_dbg_gpu_reg_op *ops;
|
||||
|
||||
@@ -518,6 +518,8 @@ void gk20a_suspend_all_sms(struct gk20a *g,
|
||||
u32 global_esr_mask, bool check_errors);
|
||||
int gk20a_gr_lock_down_sm(struct gk20a *g,
|
||||
u32 gpc, u32 tpc, u32 global_esr_mask);
|
||||
int gr_gk20a_set_sm_debug_mode(struct gk20a *g,
|
||||
struct channel_gk20a *ch, u64 sms, bool enable);
|
||||
bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch);
|
||||
int gr_gk20a_add_zbc_color(struct gk20a *g, struct gr_gk20a *gr,
|
||||
struct zbc_entry *color_val, u32 index);
|
||||
|
||||
@@ -1223,6 +1223,7 @@ void gm20b_init_gr(struct gpu_ops *gops)
|
||||
gops->gr.init_sm_dsm_reg_info = gr_gm20b_init_sm_dsm_reg_info;
|
||||
gops->gr.wait_empty = gr_gk20a_wait_idle;
|
||||
gops->gr.init_cyclestats = gr_gm20b_init_cyclestats;
|
||||
gops->gr.set_sm_debug_mode = gr_gk20a_set_sm_debug_mode;
|
||||
gops->gr.enable_cde_in_fecs = gr_gm20b_enable_cde_in_fecs;
|
||||
gops->gr.bpt_reg_info = gr_gm20b_bpt_reg_info;
|
||||
gops->gr.get_access_map = gr_gm20b_get_access_map;
|
||||
|
||||
Reference in New Issue
Block a user