diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 02455f3bb..45da9ff5a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -672,6 +672,11 @@ static inline u32 nvgpu_get_poll_timeout(struct gk20a *g) /** IO Resource in the device tree for SIM mem */ #define GK20A_SIM_IORESOURCE_MEM 2U +#ifdef CONFIG_NVGPU_VPR +int gk20a_do_idle(void *_g); +int gk20a_do_unidle(void *_g); +#endif + #ifdef CONFIG_PM int gk20a_do_idle_impl(struct gk20a *g, bool force_reset); int gk20a_do_unidle_impl(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/os/linux/module.c b/drivers/gpu/nvgpu/os/linux/module.c index ab3e82dcb..e22b0e38c 100644 --- a/drivers/gpu/nvgpu/os/linux/module.c +++ b/drivers/gpu/nvgpu/os/linux/module.c @@ -884,7 +884,7 @@ fail_timeout: * * In success, this call MUST be balanced by caller with gk20a_do_unidle() */ -static int gk20a_do_idle(void *_g) +int gk20a_do_idle(void *_g) { struct gk20a *g = (struct gk20a *)_g; @@ -934,7 +934,7 @@ int gk20a_do_unidle_impl(struct gk20a *g) /** * gk20a_do_unidle() - wrap up for gk20a_do_unidle_impl() */ -static int gk20a_do_unidle(void *_g) +int gk20a_do_unidle(void *_g) { struct gk20a *g = (struct gk20a *)_g; @@ -998,7 +998,9 @@ void gk20a_remove_support(struct gk20a *g) struct sim_nvgpu_linux *sim_linux; #ifdef CONFIG_NVGPU_VPR - tegra_unregister_idle_unidle(gk20a_do_idle); + if (nvgpu_is_enabled(g, NVGPU_SUPPORT_VPR)) { + tegra_unregister_idle_unidle(gk20a_do_idle); + } #endif #ifdef CONFIG_NVGPU_DEBUGGER diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c index bc67be564..2e1be5efe 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c +++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c @@ -24,7 +24,7 @@ #if defined(CONFIG_TEGRA_DVFS) #include #endif -#ifdef CONFIG_NVGPU_TEGRA_FUSE +#if defined(CONFIG_NVGPU_TEGRA_FUSE) || defined(CONFIG_NVGPU_VPR) #include #endif @@ -662,6 +662,7 @@ int gk20a_tegra_init_secure_alloc(struct gk20a_platform *platform) /* VPR is not supported on pre-silicon platforms - Jira NVGPU-5302 */ if (!tegra_platform_is_silicon()) { + tegra_unregister_idle_unidle(gk20a_do_idle); nvgpu_log_info(g, "VPR is not supported on pre-si platform"); return 0; } @@ -673,8 +674,10 @@ int gk20a_tegra_init_secure_alloc(struct gk20a_platform *platform) GFP_KERNEL, DMA_ATTR_NO_KERNEL_MAPPING); /* Some platforms disable VPR. In that case VPR allocations always * fail. Just disable VPR usage in nvgpu in that case. */ - if (dma_mapping_error(&tegra_vpr_dev, iova)) + if (dma_mapping_error(&tegra_vpr_dev, iova)) { + tegra_unregister_idle_unidle(gk20a_do_idle); return 0; + } secure_buffer->size = platform->secure_buffer_size; secure_buffer->phys = iova;