gpu: nvgpu: re-arrange parity counters

(1) Re-arrange the structure for parity counters reporting so multiple
units can be managed

JIRA: GPUT19X-84

Change-Id: If59a883dfe22d5a1d91a6d0ed2f5a6254434ffcb
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1485276
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
David Nieto
2017-05-18 16:50:57 -07:00
committed by mobile promotions
parent 94226c9c1e
commit 05388ad24a
10 changed files with 211 additions and 93 deletions

View File

@@ -29,6 +29,7 @@ struct gk20a_ctxsw_trace;
struct acr_desc;
struct nvgpu_mem_alloc_tracker;
struct dbg_profiler_object_data;
struct ecc_gk20a;
#include <linux/sched.h>
#include <nvgpu/lock.h>
@@ -69,6 +70,7 @@ struct dbg_profiler_object_data;
#include "pmgr/pmgr.h"
#include "therm/thrm.h"
#endif
#include "ecc_gk20a.h"
#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 18, 0)
#define WRITE_ONCE(x, val) \
@@ -991,6 +993,7 @@ struct gk20a {
struct mm_gk20a mm;
struct pmu_gk20a pmu;
struct acr_desc acr;
struct ecc_gk20a ecc;
struct cooling_device_gk20a gk20a_cdev;
#ifdef CONFIG_ARCH_TEGRA_18x_SOC
struct clk_pmupstate clk_pmu;