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gpu: nvgpu: separate fb queue management

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FB queues handling is different from DMEM/EMEM queues in many aspects.
For e.g. no rewind required, additional queue struct fields, additional
queue operations required only for FB queues, push/pop semantics are
different.
Hence prepare separate structure and APIs for FB queues. PMU will have
to deal with the queue implementation chosen. This patch does the follo-
wing:

1. Update function/structure names to falcon_fb_queue_<op/name>.
2. Export nvgpu_falcon_fb_queue_* structure and functions.
3. Removed rewind function pointer and used direct functions for push,
   pop and has_room.
4. PMU wrapper defined to use appropriate queue for empty check -
   nvgpu_pmu_queue_is_empty.
5. PMU side updates for handling the work buffer and SEC2 updates for
   usage of public queue functions.

JIRA NVGPU-1994

Change-Id: Ia5e40384e6e3f9e81d5dbc3d8138eb091337c086
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2016285
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-02-11 09:16:45 +05:30
committed by mobile promotions
parent 868853c66c
commit 05eaa33548
11 changed files with 659 additions and 375 deletions
Download Patch File Download Diff File Expand all files Collapse all files

159
drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
View File

@@ -29,6 +29,7 @@
#include <nvgpu/pmuif/gpmu_super_surf_if.h>
#include <nvgpu/falcon.h>
#include <nvgpu/falcon_queue.h>
#include <nvgpu/falcon_fb_queue.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/string.h>
@@ -110,7 +111,7 @@ int nvgpu_pmu_queue_init_fb(struct nvgpu_pmu *pmu,
u32 id, union pmu_init_msg_pmu *init)
{
struct gk20a *g = gk20a_from_pmu(pmu);
struct nvgpu_falcon_queue_params params = {0};
struct nvgpu_falcon_fb_queue_params params = {0};
u32 oflag = 0;
int err = 0;
u32 tmp_id = id;
@@ -162,7 +163,6 @@ int nvgpu_pmu_queue_init_fb(struct nvgpu_pmu *pmu,
params.id = id;
params.oflag = oflag;
params.queue_type = QUEUE_TYPE_FB;
if (tmp_id == PMU_COMMAND_QUEUE_HPQ) {
tmp_id = PMU_QUEUE_HPQ_IDX_FOR_V3;
@@ -176,9 +176,7 @@ int nvgpu_pmu_queue_init_fb(struct nvgpu_pmu *pmu,
}
params.index = init->v5.queue_index[tmp_id];
params.offset = init->v5.queue_offset;
err = nvgpu_falcon_queue_init(pmu->flcn, &pmu->queue[id], params);
err = nvgpu_falcon_fb_queue_init(pmu->flcn, &pmu->fb_queue[id], params);
if (err != 0) {
nvgpu_err(g, "queue-%d init failed", id);
}
@@ -242,11 +240,20 @@ void nvgpu_pmu_queue_free(struct nvgpu_pmu *pmu, u32 id)
goto exit;
}
if (pmu->queue[id] == NULL) {
goto exit;
if (pmu->queue_type == QUEUE_TYPE_FB) {
if (pmu->fb_queue[id] == NULL) {
goto exit;
}
nvgpu_falcon_fb_queue_free(pmu->flcn, &pmu->fb_queue[id]);
} else {
if (pmu->queue[id] == NULL) {
goto exit;
}
nvgpu_falcon_queue_free(pmu->flcn, &pmu->queue[id]);
}
nvgpu_falcon_queue_free(pmu->flcn, &pmu->queue[id]);
exit:
return;
}
@@ -256,7 +263,8 @@ static bool pmu_validate_cmd(struct nvgpu_pmu *pmu, struct pmu_cmd *cmd,
u32 queue_id)
{
struct gk20a *g = gk20a_from_pmu(pmu);
struct nvgpu_falcon_queue *queue;
struct nvgpu_falcon_fb_queue *fb_queue = NULL;
struct nvgpu_falcon_queue *queue = NULL;
u32 queue_size;
u32 in_size, out_size;
@@ -264,11 +272,11 @@ static bool pmu_validate_cmd(struct nvgpu_pmu *pmu, struct pmu_cmd *cmd,
goto invalid_cmd;
}
queue = pmu->queue[queue_id];
if (pmu->queue_type == QUEUE_TYPE_FB) {
queue_size = nvgpu_falcon_fbq_get_element_size(queue);
fb_queue = pmu->fb_queue[queue_id];
queue_size = nvgpu_falcon_fb_queue_get_element_size(fb_queue);
} else {
queue = pmu->queue[queue_id];
queue_size = nvgpu_falcon_queue_get_size(queue);
}
@@ -345,17 +353,26 @@ static int pmu_write_cmd(struct nvgpu_pmu *pmu, struct pmu_cmd *cmd,
u32 queue_id)
{
struct gk20a *g = gk20a_from_pmu(pmu);
struct nvgpu_falcon_queue *queue;
struct nvgpu_falcon_fb_queue *fb_queue = NULL;
struct nvgpu_falcon_queue *queue = NULL;
struct nvgpu_timeout timeout;
int err;
nvgpu_log_fn(g, " ");
queue = pmu->queue[queue_id];
nvgpu_timeout_init(g, &timeout, U32_MAX, NVGPU_TIMER_CPU_TIMER);
do {
err = nvgpu_falcon_queue_push(pmu->flcn, queue, cmd, cmd->hdr.size);
if (pmu->queue_type == QUEUE_TYPE_FB) {
fb_queue = pmu->fb_queue[queue_id];
err = nvgpu_falcon_fb_queue_push(pmu->flcn, fb_queue,
cmd, cmd->hdr.size);
} else {
queue = pmu->queue[queue_id];
err = nvgpu_falcon_queue_push(pmu->flcn, queue,
cmd, cmd->hdr.size);
}
if (err == -EAGAIN && nvgpu_timeout_expired(&timeout) == 0) {
nvgpu_usleep_range(1000, 2000);
} else {
@@ -414,7 +431,7 @@ static int pmu_cmd_payload_setup_rpc(struct gk20a *g, struct pmu_cmd *cmd,
{
struct nvgpu_pmu *pmu = &g->pmu;
struct pmu_v *pv = &g->ops.pmu_ver;
struct nvgpu_falcon_queue *queue = seq->cmd_queue;
struct nvgpu_falcon_fb_queue *queue = seq->cmd_queue;
struct falcon_payload_alloc alloc;
int err = 0;
@@ -435,7 +452,7 @@ static int pmu_cmd_payload_setup_rpc(struct gk20a *g, struct pmu_cmd *cmd,
if (pmu->queue_type == QUEUE_TYPE_FB) {
/* copy payload to FBQ work buffer */
nvgpu_memcpy((u8 *)
nvgpu_falcon_queue_get_fbq_work_buffer(queue) +
nvgpu_falcon_fb_queue_get_work_buffer(queue) +
alloc.dmem_offset,
(u8 *)payload->rpc.prpc, payload->rpc.size_rpc);
@@ -530,7 +547,8 @@ static int pmu_cmd_payload_setup(struct gk20a *g, struct pmu_cmd *cmd,
if (pmu->queue_type == QUEUE_TYPE_FB) {
/* copy payload to FBQ work buffer */
nvgpu_memcpy((u8 *)
nvgpu_falcon_queue_get_fbq_work_buffer(seq->cmd_queue) +
nvgpu_falcon_fb_queue_get_work_buffer(
seq->cmd_queue) +
alloc.dmem_offset,
(u8 *)payload->in.buf,
payload->in.size);
@@ -625,7 +643,7 @@ clean_up:
}
static int pmu_fbq_cmd_setup(struct gk20a *g, struct pmu_cmd *cmd,
struct nvgpu_falcon_queue *queue, struct pmu_payload *payload,
struct nvgpu_falcon_fb_queue *queue, struct pmu_payload *payload,
struct pmu_sequence *seq)
{
struct nvgpu_pmu *pmu = &g->pmu;
@@ -637,10 +655,10 @@ static int pmu_fbq_cmd_setup(struct gk20a *g, struct pmu_cmd *cmd,
int err = 0;
fbq_hdr = (struct nv_falcon_fbq_hdr *)
nvgpu_falcon_queue_get_fbq_work_buffer(queue);
nvgpu_falcon_fb_queue_get_work_buffer(queue);
flcn_cmd = (struct pmu_cmd *)
(nvgpu_falcon_queue_get_fbq_work_buffer(queue) +
(nvgpu_falcon_fb_queue_get_work_buffer(queue) +
sizeof(struct nv_falcon_fbq_hdr));
if (cmd->cmd.rpc.cmd_type == NV_PMU_RPC_CMD_ID) {
@@ -685,8 +703,8 @@ static int pmu_fbq_cmd_setup(struct gk20a *g, struct pmu_cmd *cmd,
seq->out_payload_fb_queue = false;
/* clear work queue buffer */
memset(nvgpu_falcon_queue_get_fbq_work_buffer(queue), 0,
nvgpu_falcon_fbq_get_element_size(queue));
memset(nvgpu_falcon_fb_queue_get_work_buffer(queue), 0,
nvgpu_falcon_fb_queue_get_element_size(queue));
/* Need to save room for both FBQ hdr, and the CMD */
seq->buffer_size_used = sizeof(struct nv_falcon_fbq_hdr) +
@@ -704,7 +722,7 @@ static int pmu_fbq_cmd_setup(struct gk20a *g, struct pmu_cmd *cmd,
* save queue index in seq structure
* so can free queue element when response is received
*/
seq->fbq_element_index = nvgpu_falcon_queue_get_position(queue);
seq->fbq_element_index = nvgpu_falcon_fb_queue_get_position(queue);
exit:
return err;
@@ -717,7 +735,7 @@ int nvgpu_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd,
{
struct nvgpu_pmu *pmu = &g->pmu;
struct pmu_sequence *seq = NULL;
struct nvgpu_falcon_queue *queue = pmu->queue[queue_id];
struct nvgpu_falcon_fb_queue *fb_queue = NULL;
int err;
nvgpu_log_fn(g, " ");
@@ -750,9 +768,6 @@ int nvgpu_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd,
cmd->hdr.ctrl_flags |= PMU_CMD_FLAGS_STATUS;
cmd->hdr.ctrl_flags |= PMU_CMD_FLAGS_INTR;
/* Save the queue in the seq structure. */
seq->cmd_queue = queue;
seq->callback = callback;
seq->cb_params = cb_param;
seq->msg = msg;
@@ -762,11 +777,15 @@ int nvgpu_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd,
*seq_desc = seq->desc;
if (pmu->queue_type == QUEUE_TYPE_FB) {
fb_queue = pmu->fb_queue[queue_id];
/* Save the queue in the seq structure. */
seq->cmd_queue = fb_queue;
/* Lock the FBQ work buffer */
nvgpu_falcon_queue_lock_fbq_work_buffer(queue);
nvgpu_falcon_fb_queue_lock_work_buffer(fb_queue);
/* Create FBQ work buffer & copy cmd to FBQ work buffer */
err = pmu_fbq_cmd_setup(g, cmd, queue, payload, seq);
err = pmu_fbq_cmd_setup(g, cmd, fb_queue, payload, seq);
if (err != 0) {
nvgpu_err(g, "FBQ cmd setup failed");
pmu_seq_release(pmu, seq);
@@ -779,7 +798,7 @@ int nvgpu_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd,
* in call pmu_fgq_cmd_setup()
*/
cmd = (struct pmu_cmd *)
(nvgpu_falcon_queue_get_fbq_work_buffer(queue) +
(nvgpu_falcon_fb_queue_get_work_buffer(fb_queue) +
sizeof(struct nv_falcon_fbq_hdr));
}
@@ -805,7 +824,7 @@ int nvgpu_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd,
exit:
if (pmu->queue_type == QUEUE_TYPE_FB) {
/* Unlock the FBQ work buffer */
nvgpu_falcon_queue_unlock_fbq_work_buffer(queue);
nvgpu_falcon_fb_queue_unlock_work_buffer(fb_queue);
}
nvgpu_log_fn(g, "Done, err %x", err);
@@ -824,9 +843,10 @@ static int pmu_payload_extract(struct nvgpu_pmu *pmu,
if (seq->out_payload_fb_queue) {
fbq_payload_offset =
nvgpu_falcon_queue_get_fbq_offset(seq->cmd_queue) +
seq->fbq_out_offset_in_queue_element + (seq->fbq_element_index *
nvgpu_falcon_fbq_get_element_size(seq->cmd_queue));
nvgpu_falcon_fb_queue_get_offset(seq->cmd_queue) +
seq->fbq_out_offset_in_queue_element +
(seq->fbq_element_index *
nvgpu_falcon_fb_queue_get_element_size(seq->cmd_queue));
nvgpu_mem_rd_n(g, &pmu->super_surface_buf, fbq_payload_offset,
seq->out_payload,
@@ -868,7 +888,7 @@ static void pmu_payload_fbq_free(struct nvgpu_pmu *pmu,
* set FBQ element work buffer to NULL
* Clear the in use bit for the queue entry this CMD used.
*/
nvgpu_falcon_queue_free_fbq_element(pmu->flcn, seq->cmd_queue,
nvgpu_falcon_fb_queue_free_element(pmu->flcn, seq->cmd_queue,
seq->fbq_element_index);
}
@@ -1025,15 +1045,25 @@ static int pmu_handle_event(struct nvgpu_pmu *pmu, struct pmu_msg *msg)
}
static bool pmu_falcon_queue_read(struct nvgpu_pmu *pmu,
struct nvgpu_falcon_queue *queue, void *data,
u32 queue_id, void *data,
u32 bytes_to_read, int *status)
{
struct gk20a *g = gk20a_from_pmu(pmu);
struct nvgpu_falcon_fb_queue *fb_queue = NULL;
struct nvgpu_falcon_queue *queue = NULL;
u32 bytes_read;
int err;
err = nvgpu_falcon_queue_pop(pmu->flcn, queue, data,
bytes_to_read, &bytes_read);
if (pmu->queue_type == QUEUE_TYPE_FB) {
fb_queue = pmu->fb_queue[queue_id];
err = nvgpu_falcon_fb_queue_pop(pmu->flcn, fb_queue, data,
bytes_to_read, &bytes_read);
} else {
queue = pmu->queue[queue_id];
err = nvgpu_falcon_queue_pop(pmu->flcn, queue, data,
bytes_to_read, &bytes_read);
}
if (err != 0) {
nvgpu_err(g, "fail to read msg: err %d", err);
*status = err;
@@ -1049,37 +1079,57 @@ static bool pmu_falcon_queue_read(struct nvgpu_pmu *pmu,
return true;
}
static bool pmu_read_message(struct nvgpu_pmu *pmu,
struct nvgpu_falcon_queue *queue, struct pmu_msg *msg, int *status)
bool nvgpu_pmu_queue_is_empty(struct nvgpu_pmu *pmu, u32 queue_id)
{
struct nvgpu_falcon_queue *queue = NULL;
struct nvgpu_falcon_fb_queue *fb_queue = NULL;
bool empty = true;
if (pmu->queue_type == QUEUE_TYPE_FB) {
fb_queue = pmu->fb_queue[queue_id];
empty = nvgpu_falcon_fb_queue_is_empty(pmu->flcn, fb_queue);
} else {
queue = pmu->queue[queue_id];
empty = nvgpu_falcon_queue_is_empty(pmu->flcn, queue);
}
return empty;
}
static bool pmu_read_message(struct nvgpu_pmu *pmu, u32 queue_id,
struct pmu_msg *msg, int *status)
{
struct gk20a *g = gk20a_from_pmu(pmu);
struct nvgpu_falcon_queue *queue = NULL;
u32 read_size;
u32 queue_id;
int err;
*status = 0;
if (nvgpu_falcon_queue_is_empty(pmu->flcn, queue)) {
if (nvgpu_pmu_queue_is_empty(pmu, queue_id)) {
return false;
}
queue_id = nvgpu_falcon_queue_get_id(queue);
if (!pmu_falcon_queue_read(pmu, queue, &msg->hdr, PMU_MSG_HDR_SIZE,
if (!pmu_falcon_queue_read(pmu, queue_id, &msg->hdr, PMU_MSG_HDR_SIZE,
status)) {
nvgpu_err(g, "fail to read msg from queue %d", queue_id);
goto clean_up;
}
if (msg->hdr.unit_id == PMU_UNIT_REWIND) {
err = nvgpu_falcon_queue_rewind(pmu->flcn, queue);
if (err != 0) {
nvgpu_err(g, "fail to rewind queue %d", queue_id);
*status = err;
goto clean_up;
if (pmu->queue_type != QUEUE_TYPE_FB) {
queue = pmu->queue[queue_id];
err = nvgpu_falcon_queue_rewind(pmu->flcn, queue);
if (err != 0) {
nvgpu_err(g, "fail to rewind queue %d",
queue_id);
*status = err;
goto clean_up;
}
}
/* read again after rewind */
if (!pmu_falcon_queue_read(pmu, queue, &msg->hdr,
if (!pmu_falcon_queue_read(pmu, queue_id, &msg->hdr,
PMU_MSG_HDR_SIZE, status)) {
nvgpu_err(g, "fail to read msg from queue %d",
queue_id);
@@ -1096,7 +1146,7 @@ static bool pmu_read_message(struct nvgpu_pmu *pmu,
if (msg->hdr.size > PMU_MSG_HDR_SIZE) {
read_size = msg->hdr.size - PMU_MSG_HDR_SIZE;
if (!pmu_falcon_queue_read(pmu, queue, &msg->msg, read_size,
if (!pmu_falcon_queue_read(pmu, queue_id, &msg->msg, read_size,
status)) {
nvgpu_err(g, "fail to read msg from queue %d",
queue_id);
@@ -1129,8 +1179,7 @@ int nvgpu_pmu_process_message(struct nvgpu_pmu *pmu)
return 0;
}
while (pmu_read_message(pmu,
pmu->queue[PMU_MESSAGE_QUEUE], &msg, &status)) {
while (pmu_read_message(pmu, PMU_MESSAGE_QUEUE, &msg, &status)) {
nvgpu_pmu_dbg(g, "read msg hdr: ");
nvgpu_pmu_dbg(g, "unit_id = 0x%08x, size = 0x%08x",