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gpu: nvgpu: compile-out unused apis from safety build

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This patch does the following changes:
- Compiles-out unused error reporting APIs and the related
  data structures from safety build. For this purpose, it
  introduces the new flag: CONFIG_NVGPU_INTR_DEBUG
- Updates nvgpu_report_err_to_sdl() API with one more argument,
  hw_unit_id. This aids in finding whether an error to be reported
  is corrected or uncorrected from LUT.
- Triggers SW quiesce, if an uncorrected error is reported to
  Safety_Services, in safety build.
- Renames files in cic folder by replacing gv11b with ga10b,
  since error reporting for gv11b is not supported in dev-main.

JIRA NVGPU-8002

Change-Id: Ic01e73b0208252abba1f615a2c98d770cdf41ca4
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2668466
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Rajesh Devaraj
2022-02-11 05:59:52 +00:00
committed by mobile promotions
parent 81c220b95b
commit 0699220b85
49 changed files with 456 additions and 316 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
userspace/units/bus/nvgpu-bus.c
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@@ -36,7 +36,7 @@
#include <hal/bus/bus_gm20b.h>
#include <hal/bus/bus_gp10b.h>
#include <hal/bus/bus_gv11b.h>
#include <hal/cic/mon/cic_gv11b.h>
#include <hal/cic/mon/cic_ga10b.h>
#include <nvgpu/hw/gv11b/hw_mc_gv11b.h>
#include <nvgpu/hw/gv11b/hw_bus_gv11b.h>
@@ -130,7 +130,7 @@ int test_bus_setup(struct unit_module *m, struct gk20a *g, void *args)
g->ops.mc.intr_nonstall_unit_config =
mc_gp10b_intr_nonstall_unit_config;
g->ops.ptimer.isr = gk20a_ptimer_isr;
g->ops.cic_mon.init = gv11b_cic_mon_init;
g->ops.cic_mon.init = ga10b_cic_mon_init;
/* Map register space NV_PRIV_MASTER */
if (nvgpu_posix_io_add_reg_space(g, NV_PBUS_START, NV_PBUS_SIZE) != 0) {

4
userspace/units/ce/nvgpu-ce.c
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@@ -30,7 +30,7 @@
#include <nvgpu/cic_mon.h>
#include <hal/ce/ce_gp10b.h>
#include <hal/ce/ce_gv11b.h>
#include <hal/cic/mon/cic_gv11b.h>
#include <hal/cic/mon/cic_ga10b.h>
#include <nvgpu/hw/gv11b/hw_ce_gv11b.h>
#include "nvgpu-ce.h"
@@ -128,7 +128,7 @@ int test_ce_setup_env(struct unit_module *m,
g->blcg_enabled = false;
nvgpu_spinlock_init(&g->mc.intr_lock);
g->ops.cic_mon.init = gv11b_cic_mon_init;
g->ops.cic_mon.init = ga10b_cic_mon_init;
if (nvgpu_cic_mon_setup(g) != 0) {
unit_err(m, "%s: failed to initialize CIC\n",

4
userspace/units/fb/fb_gv11b_fusa.c
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@@ -35,7 +35,7 @@
#include "hal/fb/ecc/fb_ecc_gv11b.h"
#include "hal/fb/intr/fb_intr_gv11b.h"
#include "hal/fb/intr/fb_intr_ecc_gv11b.h"
#include "hal/cic/mon/cic_gv11b.h"
#include "hal/cic/mon/cic_ga10b.h"
#include <nvgpu/hw/gv11b/hw_fb_gv11b.h>
#include "fb_fusa.h"
@@ -64,7 +64,7 @@ int fb_gv11b_init_test(struct unit_module *m, struct gk20a *g, void *args)
g->ops.mc.intr_nonstall_unit_config =
mc_gp10b_intr_nonstall_unit_config;
g->ops.fb.intr.enable = gv11b_fb_intr_enable;
g->ops.cic_mon.init = gv11b_cic_mon_init;
g->ops.cic_mon.init = ga10b_cic_mon_init;
/*
* Define some arbitrary addresses for test purposes.

4
userspace/units/gr/nvgpu-gr.c
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@@ -39,7 +39,7 @@
#include "common/gr/gr_falcon_priv.h"
#include "hal/init/hal_gv11b.h"
#include "hal/cic/mon/cic_gv11b.h"
#include "hal/cic/mon/cic_ga10b.h"
#include "nvgpu-gr.h"
#include "nvgpu-gr-gv11b.h"
@@ -168,7 +168,7 @@ int test_gr_init_setup_ready(struct unit_module *m,
nvgpu_device_init(g);
nvgpu_fifo_setup_sw(g);
g->ops.cic_mon.init = gv11b_cic_mon_init;
g->ops.cic_mon.init = ga10b_cic_mon_init;
err = nvgpu_cic_mon_setup(g);
if (err != 0) {

4
userspace/units/mm/hal/mmu_fault/gv11b_fusa/mmu-fault-gv11b-fusa.c
View File

@@ -61,7 +61,7 @@
#include "hal/mm/gmmu/gmmu_gv11b.h"
#include "hal/mm/mm_gp10b.h"
#include "hal/mm/mm_gv11b.h"
#include "hal/cic/mon/cic_gv11b.h"
#include "hal/cic/mon/cic_ga10b.h"
#include "hal/mm/mmu_fault/mmu_fault_gv11b.h"
#include "mmu-fault-gv11b-fusa.h"
@@ -222,7 +222,7 @@ int test_env_init_mm_mmu_fault_gv11b_fusa(struct unit_module *m,
unit_return_fail(m, "nvgpu_init_mm_support failed\n");
}
g->ops.cic_mon.init = gv11b_cic_mon_init;
g->ops.cic_mon.init = ga10b_cic_mon_init;
if (nvgpu_cic_mon_setup(g) != 0) {
unit_return_fail(m, "Failed to initialize CIC\n");

4
userspace/units/priv_ring/nvgpu-priv_ring.c
View File

@@ -31,7 +31,7 @@
#include <hal/priv_ring/priv_ring_gp10b.h>
#include <hal/init/hal_gv11b_litter.h>
#include <hal/mc/mc_gp10b.h>
#include "hal/cic/mon/cic_gv11b.h"
#include "hal/cic/mon/cic_ga10b.h"
#include <nvgpu/hw/gv11b/hw_pri_ringstation_sys_gv11b.h>
#include <nvgpu/hw/gv11b/hw_pri_ringstation_gpc_gv11b.h>
@@ -126,7 +126,7 @@ int test_priv_ring_setup(struct unit_module *m, struct gk20a *g, void *args)
g->ops.get_litter_value = gv11b_get_litter_value;
g->ops.mc.intr_stall_unit_config =
mc_gp10b_intr_stall_unit_config;
g->ops.cic_mon.init = gv11b_cic_mon_init;
g->ops.cic_mon.init = ga10b_cic_mon_init;
/* Map register space NV_PRIV_MASTER */
if (nvgpu_posix_io_add_reg_space(g, NV_PRIV_MASTER_START,

4
userspace/units/ptimer/nvgpu-ptimer.c
View File

@@ -28,7 +28,7 @@
#include <nvgpu/ptimer.h>
#include <nvgpu/cic_mon.h>
#include <hal/ptimer/ptimer_gk20a.h>
#include <hal/cic/mon/cic_gv11b.h>
#include <hal/cic/mon/cic_ga10b.h>
#include <nvgpu/hw/gk20a/hw_timer_gk20a.h>
#include "nvgpu-ptimer.h"
@@ -89,7 +89,7 @@ int test_setup_env(struct unit_module *m,
/* Setup HAL */
g->ops.ptimer.isr = gk20a_ptimer_isr;
g->ops.cic_mon.init = gv11b_cic_mon_init;
g->ops.cic_mon.init = ga10b_cic_mon_init;
/* Create ptimer register space */
if (nvgpu_posix_io_add_reg_space(g, PTIMER_REG_SPACE_START,