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gpu: nvgpu: PG refcount check moved to a wrapper function.
Moved PG refcount checking to a wrapper function, this function manages the refcount and decides whether to call dbg_set_powergate function. Instead of checking the dbg_s->is_pg_disabled variable, code is checking g->dbg_powergating_disabled_refcount variable to know if powergate is disabled or not. Updating hwpm ctxsw mode without disabling powergate will result in priv errors. Bug 200410871 Bug 2109765 Change-Id: I33c9022cb04cd39249c78e72584dfe6afb7212d0 Signed-off-by: Vinod G <vinodg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1753550 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Richard Zhao <rizhao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -181,7 +181,9 @@ int gk20a_dbg_gpu_dev_release(struct inode *inode, struct file *filp)
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* calling powergate/timeout enable ioctl
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*/
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nvgpu_mutex_acquire(&g->dbg_sessions_lock);
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g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, false);
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if (dbg_s->is_pg_disabled) {
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nvgpu_set_powergate_locked(dbg_s, false);
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}
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nvgpu_dbg_timeout_enable(dbg_s, NVGPU_DBG_GPU_IOCTL_TIMEOUT_ENABLE);
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/* If this session owned the perf buffer, release it */
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@@ -867,9 +869,10 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
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/* In the virtual case, the server will handle
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* disabling/enabling powergating when processing reg ops
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*/
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powergate_err = g->ops.dbg_session_ops.dbg_set_powergate(dbg_s,
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true);
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is_pg_disabled = true;
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powergate_err = nvgpu_set_powergate_locked(dbg_s, true);
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if (!powergate_err) {
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is_pg_disabled = true;
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}
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}
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if (!powergate_err) {
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@@ -938,9 +941,8 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
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/* enable powergate, if previously disabled */
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if (is_pg_disabled) {
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powergate_err =
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g->ops.dbg_session_ops.dbg_set_powergate(dbg_s,
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false);
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powergate_err = nvgpu_set_powergate_locked(dbg_s,
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false);
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}
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}
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@@ -964,14 +966,16 @@ static int nvgpu_ioctl_powergate_gk20a(struct dbg_session_gk20a *dbg_s,
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g->name, args->mode);
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nvgpu_mutex_acquire(&g->dbg_sessions_lock);
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if (args->mode == NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE) {
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err = g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, true);
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} else if (args->mode == NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE) {
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err = g->ops.dbg_session_ops.dbg_set_powergate(dbg_s, false);
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} else {
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if ((args->mode != NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE) &&
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(args->mode != NVGPU_DBG_GPU_POWERGATE_MODE_ENABLE)) {
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nvgpu_err(g, "invalid powergate mode");
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err = -EINVAL;
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goto pg_err_end;
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}
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err = nvgpu_set_powergate_locked(dbg_s,
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args->mode == NVGPU_DBG_GPU_POWERGATE_MODE_DISABLE);
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pg_err_end:
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nvgpu_mutex_release(&g->dbg_sessions_lock);
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return err;
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}
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@@ -1053,7 +1057,7 @@ static int nvgpu_dbg_gpu_ioctl_hwpm_ctxsw_mode(struct dbg_session_gk20a *dbg_s,
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err = -EINVAL;
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goto clean_up;
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}
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if (!dbg_s->is_pg_disabled) {
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if (g->dbg_powergating_disabled_refcount == 0) {
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nvgpu_err(g, "powergate is not disabled");
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err = -ENOSYS;
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goto clean_up;
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