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gpu: nvgpu: halize ltc isr

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Bug 1507804

Change-Id: I3cca0e83dbf911c94422f8bb0b2df675a170b990
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/403213
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Kevin Huang
2014-04-29 16:42:48 -07:00
committed by Dan Willemsen
parent 6c6936858a
commit 0781b55fc1
4 changed files with 12 additions and 10 deletions
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2
drivers/gpu/nvgpu/gk20a/gk20a.c
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@@ -567,7 +567,7 @@ static irqreturn_t gk20a_intr_thread_stall(int irq, void *dev_id)
if (mc_intr_0 & mc_intr_0_priv_ring_pending_f())
gk20a_priv_ring_isr(g);
if (mc_intr_0 & mc_intr_0_ltc_pending_f())
gk20a_mm_ltc_isr(g);
g->ops.ltc.isr(g);
if (mc_intr_0 & mc_intr_0_pbus_pending_f())
gk20a_pbus_isr(g);

1
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -82,6 +82,7 @@ struct gpu_ops {
void (*sync_debugfs)(struct gk20a *g);
void (*init_fs_state)(struct gk20a *g);
void (*elpg_flush)(struct gk20a *g);
void (*isr)(struct gk20a *g);
} ltc;
struct {
int (*init_fs_state)(struct gk20a *g);

10
drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
View File

@@ -203,6 +203,15 @@ static void gk20a_ltc_init_fs_state(struct gk20a *g)
g->max_ltc_count = g->ltc_count = 1;
}
void gk20a_ltc_isr(struct gk20a *g)
{
u32 intr;
intr = gk20a_readl(g, ltc_ltc0_ltss_intr_r());
gk20a_err(dev_from_gk20a(g), "ltc: %08x\n", intr);
gk20a_writel(g, ltc_ltc0_ltss_intr_r(), intr);
}
void gk20a_init_ltc(struct gpu_ops *gops)
{
gops->ltc.determine_L2_size_bytes = gk20a_determine_L2_size_bytes;
@@ -220,4 +229,5 @@ void gk20a_init_ltc(struct gpu_ops *gops)
#endif
gops->ltc.elpg_flush = gk20a_mm_g_elpg_flush_locked;
gops->ltc.init_fs_state = gk20a_ltc_init_fs_state;
gops->ltc.isr = gk20a_ltc_isr;
}

9
drivers/gpu/nvgpu/gk20a/mm_gk20a.c
View File

@@ -2996,15 +2996,6 @@ int gk20a_mm_suspend(struct gk20a *g)
return 0;
}
void gk20a_mm_ltc_isr(struct gk20a *g)
{
u32 intr;
intr = gk20a_readl(g, ltc_ltc0_ltss_intr_r());
gk20a_err(dev_from_gk20a(g), "ltc: %08x\n", intr);
gk20a_writel(g, ltc_ltc0_ltss_intr_r(), intr);
}
bool gk20a_mm_mmu_debug_mode_enabled(struct gk20a *g)
{
u32 debug_ctrl = gk20a_readl(g, fb_mmu_debug_ctrl_r());