From 07993bbbd8836331b3e49b299354d18b70af1897 Mon Sep 17 00:00:00 2001 From: Konsta Holtta Date: Thu, 29 Nov 2018 15:55:02 +0200 Subject: [PATCH] gpu: nvgpu: add runlist_write_state HAL The function gk20a_fifo_sched_disable_rw accesses HW directly. Rename it and add a HAL indirection so that it can be called from chip-independent code. Also fix some trivial MISRA violations in the function. Jira NVGPU-1309 Change-Id: Icf320738d3d1d4baa40257a9da3ca2c6b7fefc0b Signed-off-by: Konsta Holtta Reviewed-on: https://git-master.nvidia.com/r/1971274 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 15 ++++++++------- drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 2 ++ drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 1 + drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 1 + drivers/gpu/nvgpu/gv100/hal_gv100.c | 1 + drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 + drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 2 ++ drivers/gpu/nvgpu/tu104/hal_tu104.c | 1 + 8 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 2e71821b6..60bbfce86 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -2989,22 +2989,23 @@ int gk20a_fifo_preempt(struct gk20a *g, struct channel_gk20a *ch) return err; } -static void gk20a_fifo_sched_disable_rw(struct gk20a *g, u32 runlists_mask, +void gk20a_fifo_runlist_write_state(struct gk20a *g, u32 runlists_mask, u32 runlist_state) { u32 reg_val; - u32 reg_mask = 0; - u32 i; + u32 reg_mask = 0U; + u32 i = 0U; - reg_val = gk20a_readl(g, fifo_sched_disable_r()); - - for (i = 0; runlists_mask != 0; i++) { + while (runlists_mask != 0U) { if ((runlists_mask & BIT32(i)) != 0U) { reg_mask |= fifo_sched_disable_runlist_m(i); } runlists_mask &= ~BIT32(i); + i++; } + reg_val = gk20a_readl(g, fifo_sched_disable_r()); + if (runlist_state == RUNLIST_DISABLED) { reg_val |= reg_mask; } else { @@ -3026,7 +3027,7 @@ void gk20a_fifo_set_runlist_state(struct gk20a *g, u32 runlists_mask, mutex_ret = nvgpu_pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token); - gk20a_fifo_sched_disable_rw(g, runlists_mask, runlist_state); + g->ops.fifo.runlist_write_state(g, runlists_mask, runlist_state); if (mutex_ret == 0) { nvgpu_pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index e77055dea..05158abb4 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -269,6 +269,8 @@ int gk20a_fifo_disable_engine_activity(struct gk20a *g, bool wait_for_idle); int gk20a_fifo_disable_all_engine_activity(struct gk20a *g, bool wait_for_idle); +void gk20a_fifo_runlist_write_state(struct gk20a *g, u32 runlists_mask, + u32 runlist_state); void gk20a_fifo_enable_tsg_sched(struct gk20a *g, struct tsg_gk20a *tsg); void gk20a_fifo_disable_tsg_sched(struct gk20a *g, struct tsg_gk20a *tsg); diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 66238aa3d..ca147e352 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -554,6 +554,7 @@ static const struct gpu_ops gm20b_ops = { .add_sema_cmd = gk20a_fifo_add_sema_cmd, .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask, .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, + .runlist_write_state = gk20a_fifo_runlist_write_state, }, .netlist = { .get_netlist_name = gm20b_netlist_get_name, diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 19727fe62..5d80c64af 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -606,6 +606,7 @@ static const struct gpu_ops gp10b_ops = { .add_sema_cmd = gk20a_fifo_add_sema_cmd, .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask, .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, + .runlist_write_state = gk20a_fifo_runlist_write_state, }, .netlist = { .get_netlist_name = gp10b_netlist_get_name, diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index a28b6032b..aef288e68 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -780,6 +780,7 @@ static const struct gpu_ops gv100_ops = { .usermode_base = gv11b_fifo_usermode_base, .doorbell_token = gv11b_fifo_doorbell_token, .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, + .runlist_write_state = gk20a_fifo_runlist_write_state, }, .netlist = { .get_netlist_name = gv100_netlist_get_name, diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 56bdf0fdb..d49af1626 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -735,6 +735,7 @@ static const struct gpu_ops gv11b_ops = { .usermode_base = gv11b_fifo_usermode_base, .doorbell_token = gv11b_fifo_doorbell_token, .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, + .runlist_write_state = gk20a_fifo_runlist_write_state, }, .netlist = { .get_netlist_name = gv11b_netlist_get_name, diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index ee96df20d..9c98f7cdd 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -871,6 +871,8 @@ struct gpu_ops { int (*set_sm_exception_type_mask)(struct channel_gk20a *ch, u32 exception_mask); u32 (*runlist_busy_engines)(struct gk20a *g, u32 runlist_id); + void (*runlist_write_state)(struct gk20a *g, u32 runlists_mask, + u32 runlist_state); } fifo; struct pmu_v { u32 (*get_pmu_cmdline_args_size)(struct nvgpu_pmu *pmu); diff --git a/drivers/gpu/nvgpu/tu104/hal_tu104.c b/drivers/gpu/nvgpu/tu104/hal_tu104.c index 0bbd49eaa..445db9d90 100644 --- a/drivers/gpu/nvgpu/tu104/hal_tu104.c +++ b/drivers/gpu/nvgpu/tu104/hal_tu104.c @@ -811,6 +811,7 @@ static const struct gpu_ops tu104_ops = { .deinit_pdb_cache_war = tu104_deinit_pdb_cache_war, .set_sm_exception_type_mask = gk20a_tsg_set_sm_exception_type_mask, .runlist_busy_engines = gk20a_fifo_runlist_busy_engines, + .runlist_write_state = gk20a_fifo_runlist_write_state, }, .netlist = { .get_netlist_name = tu104_netlist_get_name,