gpu: nvgpu: rework pm resource reservation system

Current PM resource reservation system is limited to HWPM resources
only. And reservation tracking is done using boolean variables.

New upcoming profiler support requires reservation for all the PM
resources like SMPC and PMA stream. Using boolean variables is
not scalable and confusing. Plus the variables have to be replicated
on gpu server in case of virtualization.

Remove flag tracking mechanism and use list based approach to track
all PM reservations. Also, current HALs are defined on debugger object.
Implement new HALs in new pm_reservation object since it is really an
independent functionality.

Add new source file common/profiler/pm_reservation.c which implements
functions to reserve/release resources and to check if any resource
is reserved or not.
Add common/vgpu/pm_reservation_vgpu.c for vGPU which simply forwards
the request to gpu server.

Define new HAL object gops.pm_reservation and assign above functions
to below respective HALs :
g->ops.pm_reservation.acquire()
g->ops.pm_reservation.release()
g->ops.pm_reservation.release_all_per_vmid()

Last HAL above is only used for gpu server cleanup of guest OS.

Add below new common profiler functions that act as APIs to reserve/
release resources for rest of the units in nvgpu.
nvgpu_profiler_pm_resource_reserve()
nvgpu_profiler_pm_resource_release()

Initialize the meta data required for reservtion system in
nvgpu_pm_reservation_init() and call it during nvgpu_finalize_poweron.
Clean up the meta data before releasing struct gk20a.

Delete below HALs :
g->ops.debugger.check_and_set_global_reservation()
g->ops.debugger.check_and_set_context_reservation()
g->ops.debugger.release_profiler_reservation()

Bug 2510974
Jira NVGPU-5360

Change-Id: I4d9f89c58c791b3b2e63099a8a603462e5319222
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2367224
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/include/nvgpu/debugger.h

@@ -51,9 +51,6 @@ struct dbg_session_gk20a {
 	/* profiler session, if any */
 	bool is_profiler;
 
-	/* has a valid profiler reservation */
-	bool has_profiler_reservation;
-
 	/* power enabled or disabled */
 	bool is_pg_disabled;
 
@@ -109,14 +106,6 @@ bool nvgpu_dbg_gpu_broadcast_stop_trigger(struct nvgpu_channel *ch);
 void nvgpu_dbg_gpu_clear_broadcast_stop_trigger(struct nvgpu_channel *ch);
 
 int nvgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s, bool disable_powergate);
-bool nvgpu_check_and_set_global_reservation(
-				struct dbg_session_gk20a *dbg_s,
-				struct nvgpu_profiler_object *prof_obj);
-bool nvgpu_check_and_set_context_reservation(
-				struct dbg_session_gk20a *dbg_s,
-				struct nvgpu_profiler_object *prof_obj);
-void nvgpu_release_profiler_reservation(struct dbg_session_gk20a *dbg_s,
-				struct nvgpu_profiler_object *prof_obj);
 
 void nvgpu_dbg_session_post_event(struct dbg_session_gk20a *dbg_s);
 u32 nvgpu_set_powergate_locked(struct dbg_session_gk20a *dbg_s,

drivers/gpu/nvgpu/include/nvgpu/gk20a.h

@@ -112,6 +112,8 @@ enum nvgpu_flush_op;
 enum gk20a_mem_rw_flag;
 enum nvgpu_nvlink_minion_dlcmd;
 enum nvgpu_unit;
+enum nvgpu_profiler_pm_resource_type;
+enum nvgpu_profiler_pm_reservation_scope;
 
 #include <nvgpu/lock.h>
 #include <nvgpu/thread.h>
@@ -437,15 +439,6 @@ struct gpu_ops {
 		void (*post_events)(struct nvgpu_channel *ch);
 		int (*dbg_set_powergate)(struct dbg_session_gk20a *dbg_s,
 					bool disable_powergate);
-		bool (*check_and_set_global_reservation)(
-				struct dbg_session_gk20a *dbg_s,
-				struct nvgpu_profiler_object *prof_obj);
-		bool (*check_and_set_context_reservation)(
-				struct dbg_session_gk20a *dbg_s,
-				struct nvgpu_profiler_object *prof_obj);
-		void (*release_profiler_reservation)(
-				struct dbg_session_gk20a *dbg_s,
-				struct nvgpu_profiler_object *prof_obj);
 	} debugger;
 	struct {
 		void (*enable_membuf)(struct gk20a *g, u32 size,
@@ -463,6 +456,18 @@ struct gpu_ops {
 		int (*perfbuf_disable)(struct gk20a *g);
 	} perfbuf;
 #endif
+#ifdef CONFIG_NVGPU_PROFILER
+	struct {
+		int (*acquire)(struct gk20a *g, u32 reservation_id,
+			enum nvgpu_profiler_pm_resource_type pm_resource,
+			enum nvgpu_profiler_pm_reservation_scope scope,
+			u32 vmid);
+		int (*release)(struct gk20a *g, u32 reservation_id,
+			enum nvgpu_profiler_pm_resource_type pm_resource,
+			u32 vmid);
+		void (*release_all_per_vmid)(struct gk20a *g, u32 vmid);
+	} pm_reservation;
+#endif
 
 	u32 (*get_litter_value)(struct gk20a *g, int value);
 	int (*chip_init_gpu_characteristics)(struct gk20a *g);
@@ -831,16 +836,13 @@ struct gk20a {
 		u64 offset;
 	} perfbuf;
 
-	/* For profiler reservations */
-	bool global_profiler_reservation_held;
-	int profiler_reservation_count;
-
 	bool mmu_debug_ctrl;
 	u32 mmu_debug_mode_refcnt;
 #endif /* CONFIG_NVGPU_DEBUGGER */
 
 #ifdef CONFIG_NVGPU_PROFILER
 	struct nvgpu_list_node profiler_objects;
+	struct nvgpu_pm_resource_reservations *pm_reservations;
 #endif
 
 #ifdef CONFIG_NVGPU_FECS_TRACE

drivers/gpu/nvgpu/include/nvgpu/pm_reservation.h

@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2020, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef NVGPU_PM_RESERVATION_H
+#define NVGPU_PM_RESERVATION_H
+
+#ifdef CONFIG_NVGPU_PROFILER
+
+#include <nvgpu/list.h>
+#include <nvgpu/lock.h>
+
+struct gk20a;
+
+enum nvgpu_profiler_pm_reservation_scope {
+	NVGPU_PROFILER_PM_RESERVATION_SCOPE_DEVICE,
+	NVGPU_PROFILER_PM_RESERVATION_SCOPE_CONTEXT,
+};
+
+enum nvgpu_profiler_pm_resource_type {
+	NVGPU_PROFILER_PM_RESOURCE_TYPE_HWPM_LEGACY,
+	NVGPU_PROFILER_PM_RESOURCE_TYPE_SMPC,
+	NVGPU_PROFILER_PM_RESOURCE_TYPE_PMA_STREAM,
+	NVGPU_PROFILER_PM_RESOURCE_TYPE_COUNT,
+};
+
+struct nvgpu_pm_resource_reservation_entry {
+	struct nvgpu_list_node entry;
+
+	u32 reservation_id;
+	u32 vmid;
+	enum nvgpu_profiler_pm_reservation_scope scope;
+};
+
+static inline struct nvgpu_pm_resource_reservation_entry *
+nvgpu_pm_resource_reservation_entry_from_entry(struct nvgpu_list_node *node)
+{
+	return (struct nvgpu_pm_resource_reservation_entry *)
+		((uintptr_t)node - offsetof(struct nvgpu_pm_resource_reservation_entry, entry));
+}
+
+struct nvgpu_pm_resource_reservations {
+	struct nvgpu_list_node head;
+	u32 count;
+	struct nvgpu_mutex lock;
+};
+
+int nvgpu_pm_reservation_init(struct gk20a *g);
+void nvgpu_pm_reservation_deinit(struct gk20a *g);
+
+int nvgpu_pm_reservation_acquire(struct gk20a *g, u32 reservation_id,
+	enum nvgpu_profiler_pm_resource_type pm_resource,
+	enum nvgpu_profiler_pm_reservation_scope scope,
+	u32 vmid);
+int nvgpu_pm_reservation_release(struct gk20a *g, u32 reservation_id,
+	enum nvgpu_profiler_pm_resource_type pm_resource,
+	u32 vmid);
+void nvgpu_pm_reservation_release_all_per_vmid(struct gk20a *g, u32 vmid);
+
+#endif /* CONFIG_NVGPU_PROFILER */
+#endif /* NVGPU_PM_RESERVATION_H */

drivers/gpu/nvgpu/include/nvgpu/profiler.h

@@ -26,6 +26,7 @@
 #ifdef CONFIG_NVGPU_PROFILER
 
 #include <nvgpu/list.h>
+#include <nvgpu/pm_reservation.h>
 
 struct gk20a;
 struct nvgpu_channel;
@@ -48,8 +49,11 @@ struct nvgpu_profiler_object {
 	 */
 	struct nvgpu_tsg *tsg;
 
-	/* If profiler object has HWPM reservation. */
-	bool has_reservation;
+	/* If profiler object has reservation for each resource. */
+	bool reserved[NVGPU_PROFILER_PM_RESOURCE_TYPE_COUNT];
+
+	/* Scope of the profiler object */
+	enum nvgpu_profiler_pm_reservation_scope scope;
 
 	/*
 	 * Entry of this object into global list of objects
@@ -66,8 +70,14 @@ nvgpu_profiler_object_from_prof_obj_entry(struct nvgpu_list_node *node)
 };
 
 int nvgpu_profiler_alloc(struct gk20a *g,
-	struct nvgpu_profiler_object **_prof);
+	struct nvgpu_profiler_object **_prof,
+	enum nvgpu_profiler_pm_reservation_scope scope);
 void nvgpu_profiler_free(struct nvgpu_profiler_object *prof);
 
+int nvgpu_profiler_pm_resource_reserve(struct nvgpu_profiler_object *prof,
+	enum nvgpu_profiler_pm_resource_type pm_resource);
+int nvgpu_profiler_pm_resource_release(struct nvgpu_profiler_object *prof,
+	enum nvgpu_profiler_pm_resource_type pm_resource);
+
 #endif /* CONFIG_NVGPU_PROFILER */
 #endif /* NVGPU_PROFILER_H */

drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h

@@ -564,13 +564,15 @@ struct tegra_vgpu_clear_sm_error_state {
 };
 
 enum {
-	TEGRA_VGPU_PROF_GET_GLOBAL = 0,
-	TEGRA_VGPU_PROF_GET_CONTEXT,
-	TEGRA_VGPU_PROF_RELEASE
+	TEGRA_VGPU_PROF_PM_RESERVATION_ACQUIRE = 0,
+	TEGRA_VGPU_PROF_PM_RESERVATION_RELEASE,
 };
 
 struct tegra_vgpu_prof_mgt_params {
 	u32 mode;
+	u32 reservation_id;
+	u32 pm_resource;
+	u32 scope;
 };
 
 struct tegra_vgpu_perfbuf_mgt_params {