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gpu: nvgpu: update the gr subunit test document

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Update the gr.falcon and gr.config unit test document to
include the subunit function being called from the test.

Jira NVGPU-4359

Change-Id: Id1469277273e78c16353767a29d3ea06bcd5c8ef
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279230
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
vinodg
2020-01-14 18:10:39 -08:00
committed by Alex Waterman
parent ab3f04213c
commit 08e52125e3
2 changed files with 28 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
userspace/units/gr/config/nvgpu-gr-config.h
View File

@@ -42,9 +42,9 @@ struct unit_module;
*
* Test Type: Feature
*
* Input: None
* Targets: #nvgpu_gr_config_init
*
* Targets: #nvgpu_gr_config_init.
* Input: None
*
* Steps:
* - Call nvgpu_gr_config_init
@@ -61,7 +61,7 @@ int test_gr_config_init(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature
*
* Targets: #nvgpu_gr_config_deinit.
* Targets: #nvgpu_gr_config_deinit
*
* Input: #test_gr_init_setup and #test_gr_config_init
* must have been executed successfully.
@@ -83,9 +83,6 @@ int test_gr_config_deinit(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature, Error guessing
*
* Input: #test_gr_init_setup and #test_gr_config_init
* must have been executed successfully.
*
* Targets: #nvgpu_gr_config_get_max_gpc_count,
* #nvgpu_gr_config_get_max_tpc_count,
* #nvgpu_gr_config_get_max_tpc_per_gpc_count,
@@ -100,8 +97,11 @@ int test_gr_config_deinit(struct unit_module *m, struct gk20a *g, void *args);
* #nvgpu_gr_config_get_gpc_tpc_count,
* #nvgpu_gr_config_get_pes_tpc_count,
* #nvgpu_gr_config_get_pes_tpc_mask,
* #nvgpu_gr_config_get_gpc_tpc_mask_base,
* #nvgpu_gr_config_get_gpc_tpc_count_base.
* #nvgpu_gr_config_get_gpc_tpc_count_base,
* #nvgpu_gr_config_get_gpc_tpc_mask_base
*
* Input: #test_gr_init_setup and #test_gr_config_init
* must have been executed successfully.
*
* Steps:
* - Read configuration count and mask informations from the driver
@@ -123,12 +123,18 @@ int test_gr_config_count(struct unit_module *m, struct gk20a *g, void *args);
* Test Type: Feature, Error guessing
*
* Targets: #nvgpu_gr_config_set_no_of_sm,
* #nvgpu_gr_config_get_no_of_sm,
* #nvgpu_gr_config_get_sm_info,
* #nvgpu_gr_config_set_sm_info_gpc_index,
* #nvgpu_gr_config_get_sm_info_gpc_index,
* #nvgpu_gr_config_set_sm_info_tpc_index,
* #nvgpu_gr_config_get_sm_info_tpc_index,
* #nvgpu_gr_config_set_sm_info_global_tpc_index,
* #nvgpu_gr_config_get_sm_info_global_tpc_index,
* #nvgpu_gr_config_set_sm_info_sm_index,
* #nvgpu_gr_config_get_sm_info_sm_index,
* #nvgpu_gr_config_set_gpc_tpc_mask,
* #nvgpu_gr_config_get_gpc_tpc_mask.
* #nvgpu_gr_config_get_gpc_tpc_mask
*
* Input: #test_gr_init_setup and #test_gr_config_init
* must have been executed successfully.
@@ -151,10 +157,12 @@ int test_gr_config_set_get(struct unit_module *m, struct gk20a *g, void *args);
*
* Test Type: Feature, Error guessing
*
* Input: #test_gr_init_setup must have been executed successfully.
*
* Targets: #nvgpu_gr_config_init,
* #nvgpu_gr_config_deinit,
* gops_gr_config.init_sm_id_table,
* gv100_gr_config_init_sm_id_table
*
* Input: #test_gr_init_setup must have been executed successfully.
*
* Steps:
* - Force memory allocation failures for various structures within

15
userspace/units/gr/falcon/nvgpu-gr-falcon.h
View File

@@ -40,7 +40,9 @@ struct unit_module;
*
* Test Type: Feature, Error injection
*
* Targets: #nvgpu_gr_falcon_init_support.
* Targets: #nvgpu_gr_falcon_init_support,
* #nvgpu_gr_falcon_load_secure_ctxsw_ucode,
* gops_gr_falcon.load_ctxsw_ucode
*
* Input: #test_gr_init_setup_ready must have been executed successfully.
*
@@ -66,7 +68,7 @@ int test_gr_falcon_init(struct unit_module *m,
*
* Test Type: Feature, Error injection
*
* Targets: #nvgpu_gr_falcon_remove_support.
* Targets: #nvgpu_gr_falcon_remove_support
*
* Input: #test_gr_falcon_init must have been executed successfully.
*
@@ -88,7 +90,7 @@ int test_gr_falcon_deinit(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: #nvgpu_gr_falcon_init_ctxsw.
* Targets: #nvgpu_gr_falcon_init_ctxsw
*
* Input: #test_gr_falcon_init must have been executed successfully.
*
@@ -111,7 +113,7 @@ int test_gr_falcon_init_ctxsw(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: #nvgpu_gr_falcon_init_ctx_state.
* Targets: #nvgpu_gr_falcon_init_ctx_state
*
* Input: #test_gr_falcon_init must have been executed successfully.
*
@@ -134,7 +136,7 @@ int test_gr_falcon_init_ctx_state(struct unit_module *m,
*
* Targets: #nvgpu_gr_falcon_get_fecs_ucode_segments,
* #nvgpu_gr_falcon_get_gpccs_ucode_segments,
* #nvgpu_gr_falcon_get_surface_desc_cpu_va.
* #nvgpu_gr_falcon_get_surface_desc_cpu_va
*
* Input: #test_gr_falcon_init must have been executed successfully.
*
@@ -157,7 +159,8 @@ int test_gr_falcon_query_test(struct unit_module *m,
*
* Test Type: Error injection
*
* Targets: #nvgpu_gr_falcon_init_ctxsw_ucode.
* Targets: #nvgpu_gr_falcon_init_ctxsw_ucode,
* gops_gr_falcon.load_ctxsw_ucode
*
* Input: #test_gr_falcon_init must have been executed successfully.
*