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gpu: nvgpu: add more compile flags to posix iGPU

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Added bellow CFLAGS:
    -Werror -Wall -Wextra \
    -Wmissing-braces -Wpointer-arith -Wundef \
    -Wconversion -Wsign-conversion \
    -Wformat-security \
    -Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough

Also fixed all of compile errors for posix.

It's preparing for porting gpu server.

Jira GVSCI-11640

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I30b09a62a57396abd642922e22f2e550a96f42c2
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555059
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Richard Zhao
2021-07-06 21:32:50 -07:00
committed by mobile promotions
parent 9e5c88c1ef
commit 09cf3642ef
21 changed files with 169 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
drivers/gpu/nvgpu/os/posix/posix-vgpu.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -29,6 +29,7 @@
struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g)
{
(void)g;
BUG();
return NULL;
}
@@ -36,17 +37,25 @@ struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g)
int vgpu_ivc_init(struct gk20a *g, u32 elems,
const size_t *queue_sizes, u32 queue_start, u32 num_queues)
{
(void)g;
(void)elems;
(void)queue_sizes;
(void)queue_start;
(void)num_queues;
BUG();
return 0;
}
void vgpu_ivc_deinit(u32 queue_start, u32 num_queues)
{
(void)queue_start;
(void)num_queues;
BUG();
}
void vgpu_ivc_release(void *handle)
{
(void)handle;
BUG();
}
@@ -59,12 +68,21 @@ u32 vgpu_ivc_get_server_vmid(void)
int vgpu_ivc_recv(u32 index, void **handle, void **data,
size_t *size, u32 *sender)
{
(void)index;
(void)handle;
(void)data;
(void)size;
(void)sender;
BUG();
return 0;
}
int vgpu_ivc_send(u32 peer, u32 index, void *data, size_t size)
{
(void)peer;
(void)index;
(void)data;
(void)size;
BUG();
return 0;
}
@@ -72,6 +90,11 @@ int vgpu_ivc_send(u32 peer, u32 index, void *data, size_t size)
int vgpu_ivc_sendrecv(u32 peer, u32 index, void **handle,
void **data, size_t *size)
{
(void)peer;
(void)index;
(void)handle;
(void)data;
(void)size;
BUG();
return 0;
}
@@ -85,42 +108,52 @@ u32 vgpu_ivc_get_peer_self(void)
void *vgpu_ivc_oob_get_ptr(u32 peer, u32 index, void **ptr,
size_t *size)
{
(void)peer;
(void)index;
(void)ptr;
(void)size;
BUG();
return NULL;
}
void vgpu_ivc_oob_put_ptr(void *handle)
{
(void)handle;
BUG();
}
struct tegra_hv_ivm_cookie *vgpu_ivm_mempool_reserve(unsigned int id)
{
(void)id;
BUG();
return NULL;
}
int vgpu_ivm_mempool_unreserve(struct tegra_hv_ivm_cookie *cookie)
{
(void)cookie;
BUG();
return 0;
}
u64 vgpu_ivm_get_ipa(struct tegra_hv_ivm_cookie *cookie)
{
(void)cookie;
BUG();
return 0ULL;
}
u64 vgpu_ivm_get_size(struct tegra_hv_ivm_cookie *cookie)
{
(void)cookie;
BUG();
return 0ULL;
}
void *vgpu_ivm_mempool_map(struct tegra_hv_ivm_cookie *cookie)
{
(void)cookie;
BUG();
return NULL;
}
@@ -128,10 +161,13 @@ void *vgpu_ivm_mempool_map(struct tegra_hv_ivm_cookie *cookie)
void vgpu_ivm_mempool_unmap(struct tegra_hv_ivm_cookie *cookie,
void *addr)
{
(void)cookie;
(void)addr;
BUG();
}
int vgpu_init_hal_os(struct gk20a *g)
{
(void)g;
BUG();
return -ENOSYS;
}