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gpu: nvgpu: ignore deterministic submit flag for safety
Safety only supports usermode submits so there is no need to process DETERMINISTIC submit flag. For safety, while processing DETERMINISTIC submit flag we are only setting deterministic field of struct channel_gk20a and taking power reference with gk20a_busy(). On qnx safety deterministic field is just used to check the syncpoint allocation and taking power reference is a noop. Jira NVGPU-4378 Change-Id: I1dc256db7d9fab93bef8fcc42bdb36f611b3ef40 Signed-off-by: shashank singh <shashsingh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284644 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
038b928650
commit
0b4ccc7247
@@ -284,7 +284,9 @@ int test_gv11b_channel_debug_dump(struct unit_module *m,
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info->tsgid = ch->tsgid;
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info->pid = ch->pid;
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info->refs = nvgpu_atomic_read(&ch->ref_count);
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#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
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info->deterministic = (branches & F_CHANNEL_DUMP_DETERMINISTIC) != 0;
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#endif
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info->hw_state.enabled = (branches & F_CHANNEL_DUMP_ENABLED) != 0;
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info->hw_state.busy = (branches & F_CHANNEL_DUMP_BUSY) != 0;
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info->hw_state.status_string = "fake";
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@@ -497,6 +497,7 @@ int test_channel_close(struct unit_module *m, struct gk20a *g, void *vargs)
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ch->vm = NULL;
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}
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#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
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if (branches & F_CHANNEL_CLOSE_DETERMINISTIC) {
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/* Compensate for atomic dec in gk20a_idle() */
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nvgpu_atomic_set(&g->usage_count, 1);
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@@ -507,6 +508,7 @@ int test_channel_close(struct unit_module *m, struct gk20a *g, void *vargs)
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ch->deterministic = true;
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ch->deterministic_railgate_allowed = true;
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}
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#endif
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g->ops.gr.setup.free_subctx =
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branches & F_CHANNEL_CLOSE_FREE_SUBCTX ?
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@@ -601,7 +603,9 @@ int test_channel_close(struct unit_module *m, struct gk20a *g, void *vargs)
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ch->subctx = NULL;
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}
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#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
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ch->deterministic = false;
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#endif
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ch->deterministic_railgate_allowed = false;
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unit_assert(ch->usermode_submit_enabled == false, goto done);
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@@ -819,6 +823,7 @@ int test_channel_setup_bind(struct unit_module *m, struct gk20a *g, void *vargs)
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stub_os_channel_alloc_usermode_buffers_ENOMEM;
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}
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#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
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if (branches &
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F_CHANNEL_SETUP_BIND_USERMODE_SUPPORT_DETERMINISTIC) {
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bind_args.flags |=
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@@ -833,6 +838,7 @@ int test_channel_setup_bind(struct unit_module *m, struct gk20a *g, void *vargs)
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nvgpu_posix_enable_fault_injection(l_nvgpu_fi, true, 0);
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}
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#endif
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if (branches &
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F_CHANNEL_SETUP_BIND_NON_USERMODE_DETERMINISTIC) {
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bind_args.flags |=
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@@ -895,7 +901,9 @@ int test_channel_setup_bind(struct unit_module *m, struct gk20a *g, void *vargs)
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nvgpu_dma_free(g, &ch->usermode_userd);
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nvgpu_dma_free(g, &ch->usermode_gpfifo);
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ch->userd_iova = 0U;
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#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
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ch->deterministic = false;
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#endif
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nvgpu_atomic_set(&ch->bound, false);
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}
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bind_args.flags &=
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@@ -1307,6 +1315,7 @@ done:
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#define F_CHANNEL_DETERMINISTIC_UNIDLE_GK20ABUSY_FAIL BIT(2)
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#define F_CHANNEL_DETERMINISTIC_IDLE_LAST BIT(3)
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#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
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static const char *f_channel_deterministic_idle_unidle[] = {
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"deterministic_channel",
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"determinstic_railgate_allowed",
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@@ -1440,6 +1449,7 @@ done:
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return ret;
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}
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#endif
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#define F_CHANNEL_SUSPEND_RESUME_UNSERVICEABLE_CH BIT(0)
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#define F_CHANNEL_SUSPEND_RESUME_INVALID_TSGID BIT(1)
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@@ -1748,9 +1758,11 @@ int test_channel_semaphore_wakeup(struct unit_module *m,
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unit_verbose(m, "%s branches=%s\n", __func__,
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branches_str(branches, f_channel_semaphore_wakeup));
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#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
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if (branches & F_CHANNEL_SEMAPHORRE_WAKEUP_DETERMINISTIC_CH) {
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ch->deterministic = true;
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}
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#endif
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ch->semaphore_wq.initialized = branches &
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F_CHANNEL_SEMAPHORRE_WAKEUP_COND_BROADCAST_FAIL ?
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@@ -1765,7 +1777,9 @@ int test_channel_semaphore_wakeup(struct unit_module *m,
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nvgpu_channel_semaphore_wakeup(g, false);
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unit_assert(stub[0].count == (global_count - 1U), goto done);
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#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
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ch->deterministic = false;
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#endif
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}
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ret = UNIT_SUCCESS;
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@@ -1993,7 +2007,9 @@ struct unit_module_test nvgpu_channel_tests[] = {
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UNIT_TEST(ch_abort, test_channel_abort, &unit_ctx, 0),
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UNIT_TEST(mark_error, test_channel_mark_error, &unit_ctx, 0),
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UNIT_TEST(sw_quiesce, test_channel_sw_quiesce, &unit_ctx, 0),
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#ifdef CONFIG_NVGPU_IOCTL_NON_FUSA
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UNIT_TEST(idle_unidle, test_channel_deterministic_idle_unidle, &unit_ctx, 0),
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#endif
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UNIT_TEST(suspend_resume, test_channel_suspend_resume_serviceable_chs, &unit_ctx, 0),
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UNIT_TEST(debug_dump, test_channel_debug_dump, &unit_ctx, 0),
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UNIT_TEST(semaphore_wakeup, test_channel_semaphore_wakeup, &unit_ctx, 0),
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