gpu: nvgpu: Per-chip context creation

Add HAL for context creation, and expose functions that T18x context
creation needs.

Bug 1517461
Bug 1521790
Bug 200063473

Change-Id: I63d1c52594e851570b677184a4585d402125a86d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/660237
This commit is contained in:
Terje Bergstrom
2014-12-03 16:13:39 +02:00
committed by Dan Willemsen
parent 5477d0f4c2
commit 0d9bb7f82e
5 changed files with 83 additions and 39 deletions

View File

@@ -144,6 +144,16 @@ struct gpu_ops {
int (*add_zbc_depth)(struct gk20a *g, struct gr_gk20a *gr,
struct zbc_entry *depth_val, u32 index);
u32 (*pagepool_default_size)(struct gk20a *g);
int (*init_ctx_state)(struct gk20a *g);
int (*alloc_gr_ctx)(struct gk20a *g,
struct gr_ctx_desc **__gr_ctx, struct vm_gk20a *vm,
u32 padding);
void (*free_gr_ctx)(struct gk20a *g,
struct vm_gk20a *vm,
struct gr_ctx_desc *gr_ctx);
void (*update_ctxsw_preemption_mode)(struct gk20a *g,
struct channel_ctx_gk20a *ch_ctx,
void *ctx_ptr);
} gr;
const char *name;
struct {