diff --git a/drivers/gpu/nvgpu/common/ce/ce.c b/drivers/gpu/nvgpu/common/ce/ce.c
index 01b5e7a13..9d54d5393 100644
--- a/drivers/gpu/nvgpu/common/ce/ce.c
+++ b/drivers/gpu/nvgpu/common/ce/ce.c
@@ -444,6 +444,11 @@ int nvgpu_ce_init_support(struct gk20a *g)
 	ce_app->app_state = NVGPU_CE_ACTIVE;
 
 	nvgpu_mutex_release(&ce_app->app_mutex);
+
+	if (g->ops.ce.init_prod_values != NULL) {
+		g->ops.ce.init_prod_values(g);
+	}
+
 	nvgpu_log(g, gpu_dbg_cde_ctx, "ce: init finished");
 
 	return 0;
diff --git a/drivers/gpu/nvgpu/hal/ce/ce_gv11b.h b/drivers/gpu/nvgpu/hal/ce/ce_gv11b.h
index 7752a675c..a27e77269 100644
--- a/drivers/gpu/nvgpu/hal/ce/ce_gv11b.h
+++ b/drivers/gpu/nvgpu/hal/ce/ce_gv11b.h
@@ -30,5 +30,6 @@ struct gk20a;
 void gv11b_ce_mthd_buffer_fault_in_bar2_fault(struct gk20a *g);
 u32 gv11b_ce_get_num_pce(struct gk20a *g);
 void gv11b_ce_stall_isr(struct gk20a *g, u32 inst_id, u32 pri_base);
+void gv11b_ce_init_prod_values(struct gk20a *g);
 
 #endif /* NVGPU_CE_GV11B_H */
diff --git a/drivers/gpu/nvgpu/hal/ce/ce_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/ce/ce_gv11b_fusa.c
index 8f901390d..5cd988999 100644
--- a/drivers/gpu/nvgpu/hal/ce/ce_gv11b_fusa.c
+++ b/drivers/gpu/nvgpu/hal/ce/ce_gv11b_fusa.c
@@ -104,3 +104,17 @@ void gv11b_ce_mthd_buffer_fault_in_bar2_fault(struct gk20a *g)
 		}
 	}
 }
+
+void gv11b_ce_init_prod_values(struct gk20a *g)
+{
+	u32 reg_val;
+	u32 num_lce, lce;
+
+	num_lce = g->ops.top.get_num_lce(g);
+
+	for (lce = 0U; lce < num_lce; lce++) {
+		reg_val = nvgpu_readl(g, ce_lce_opt_r(lce));
+		reg_val |= ce_lce_opt_force_barriers_npl__prod_f();
+		nvgpu_writel(g, ce_lce_opt_r(lce), reg_val);
+	}
+}
diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
index efb05f090..d725134dd 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c
@@ -222,6 +222,7 @@ static const struct gpu_ops gv11b_ops = {
 		.get_num_pce = gv11b_ce_get_num_pce,
 		.mthd_buffer_fault_in_bar2_fault =
 				gv11b_ce_mthd_buffer_fault_in_bar2_fault,
+		.init_prod_values = gv11b_ce_init_prod_values,
 	},
 	.gr = {
 #ifdef CONFIG_NVGPU_DEBUGGER
diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c
index 796fb3f88..ada416604 100644
--- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c
+++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c
@@ -265,6 +265,7 @@ static const struct gpu_ops tu104_ops = {
 		.get_num_pce = gv11b_ce_get_num_pce,
 		.mthd_buffer_fault_in_bar2_fault =
 				gv11b_ce_mthd_buffer_fault_in_bar2_fault,
+		.init_prod_values = gv11b_ce_init_prod_values,
 	},
 	.gr = {
 #ifdef CONFIG_NVGPU_DEBUGGER
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index 9445f7827..e41b31ada 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -285,6 +285,7 @@ struct gpu_ops {
 		u32 (*isr_nonstall)(struct gk20a *g, u32 inst_id, u32 pri_base);
 		u32 (*get_num_pce)(struct gk20a *g);
 		void (*mthd_buffer_fault_in_bar2_fault)(struct gk20a *g);
+		void (*init_prod_values)(struct gk20a *g);
 	} ce;
 	struct {
 #ifdef CONFIG_NVGPU_DEBUGGER
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h
index 6a75115ba..542508387 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h
@@ -72,4 +72,7 @@
 #define ce_intr_status_mthd_buffer_fault_pending_f()                     (0x10U)
 #define ce_intr_status_mthd_buffer_fault_reset_f()                       (0x10U)
 #define ce_pce_map_r()                                             (0x00104028U)
+#define ce_lce_opt_r(i)\
+		(nvgpu_safe_add_u32(0x00104414U, nvgpu_safe_mult_u32((i), 128U)))
+#define ce_lce_opt_force_barriers_npl__prod_f()                           (0x8U)
 #endif
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h b/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h
index 29ecab318..231112a94 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h
@@ -72,4 +72,7 @@
 #define ce_intr_status_mthd_buffer_fault_pending_f()                     (0x10U)
 #define ce_intr_status_mthd_buffer_fault_reset_f()                       (0x10U)
 #define ce_pce_map_r()                                             (0x00104028U)
+#define ce_lce_opt_r(i)\
+		(nvgpu_safe_add_u32(0x00104414U, nvgpu_safe_mult_u32((i), 128U)))
+#define ce_lce_opt_force_barriers_npl__prod_f()                           (0x8U)
 #endif