From 0e6c8bb521a3acdb9317270329c8991756209a1e Mon Sep 17 00:00:00 2001 From: Austin Tajiri Date: Wed, 7 Dec 2022 07:28:23 +0000 Subject: [PATCH] gpu: nvgpu: set gpc_mask via HAL when possible Update gr_config_set_gpc_mask() to always set gpc_mask via the HAL when possible and not just when CONFIG_NVGPU_DGPU is set. In GA10B, logical GPC ID does not necessarily equal physical GPC ID. Jira GVSCI-14589 Change-Id: I8785b6a8a7c21a9d4401137aed5135f150697e88 Signed-off-by: Austin Tajiri Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2823541 Reviewed-by: svcacv Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/common/gr/gr_config.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/gpu/nvgpu/common/gr/gr_config.c b/drivers/gpu/nvgpu/common/gr/gr_config.c index 9570576c4..9cbc58034 100644 --- a/drivers/gpu/nvgpu/common/gr/gr_config.c +++ b/drivers/gpu/nvgpu/common/gr/gr_config.c @@ -380,14 +380,9 @@ static void gr_config_log_info(struct gk20a *g, static void gr_config_set_gpc_mask(struct gk20a *g, struct nvgpu_gr_config *config) { -#ifdef CONFIG_NVGPU_DGPU if (g->ops.gr.config.get_gpc_mask != NULL) { config->gpc_mask = g->ops.gr.config.get_gpc_mask(g); - } else -#else - (void)g; -#endif - { + } else { config->gpc_mask = nvgpu_safe_sub_u32(BIT32(config->gpc_count), 1U); }