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gpu: nvgpu: units: pramin build issues for dGPU

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Fix pramin related build issues in unit tests, when enabling dGPU
in safety build.

pram_data032_r is now defined as a macro which cannot be used to
initialize g->ops.pramin.data032_r in unit tests.

Instead, use nvgpu_pramin_ops_init, and check that
g->ops.pramin.data032_r is non NULL.

Jira NVGPU-4661

Change-Id: I33522fc42bfe5f8c23b579126a21680fd5880fd8
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2314206
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2020-03-16 18:24:05 -04:00
committed by Alex Waterman
parent 0c23bf57ea
commit 0fa55ffac9
4 changed files with 13 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
userspace/units/mm/allocators/buddy_allocator/buddy_allocator.c
View File

@@ -34,6 +34,7 @@
#include <hal/bus/bus_gk20a.h>
#include <hal/mm/gmmu/gmmu_gp10b.h>
#include <hal/pramin/pramin_init.h>
#include <nvgpu/hw/gk20a/hw_pram_gk20a.h>
#include "buddy_allocator.h"
@@ -79,7 +80,8 @@ static struct vm_gk20a *init_vm_env(struct unit_module *m, struct gk20a *g,
#ifdef CONFIG_NVGPU_DGPU
/* Minimum HAL init for PRAMIN */
g->ops.bus.set_bar0_window = gk20a_bus_set_bar0_window;
g->ops.pramin.data032_r = pram_data032_r;
nvgpu_pramin_ops_init(g);
unit_assert(g->ops.pramin.data032_r != NULL, return NULL);
#endif
/* vm should init with SYSMEM */

4
userspace/units/mm/dma/dma.c
View File

@@ -50,6 +50,7 @@
#include "hal/fifo/ramin_gk20a.h"
#include "hal/fifo/ramin_gm20b.h"
#include "hal/fifo/ramin_gp10b.h"
#include "hal/pramin/pramin_init.h"
#include <nvgpu/posix/posix-fault-injection.h>
@@ -240,7 +241,8 @@ int test_mm_dma_init(struct unit_module *m, struct gk20a *g, void *args)
#ifdef CONFIG_NVGPU_DGPU
/* Minimum HAL init for PRAMIN */
g->ops.bus.set_bar0_window = gk20a_bus_set_bar0_window;
g->ops.pramin.data032_r = pram_data032_r;
nvgpu_pramin_ops_init(g);
unit_assert(g->ops.pramin.data032_r != NULL, return UNIT_FAIL);
#endif
/* Register space: BUS_BAR0 */

4
userspace/units/mm/nvgpu_mem/nvgpu_mem.c
View File

@@ -36,6 +36,7 @@
#include <os/posix/os_posix.h>
#include <hal/mm/gmmu/gmmu_gp10b.h>
#include <hal/pramin/pramin_init.h>
#include <hal/bus/bus_gk20a.h>
#include <nvgpu/hw/gk20a/hw_pram_gk20a.h>
@@ -112,7 +113,8 @@ static int init_vidmem_env(struct unit_module *m, struct gk20a *g)
/* Minimum HAL init for PRAMIN */
g->ops.bus.set_bar0_window = gk20a_bus_set_bar0_window;
g->ops.pramin.data032_r = pram_data032_r;
nvgpu_pramin_ops_init(g);
unit_assert(g->ops.pramin.data032_r != NULL, return -EINVAL);
err = nvgpu_dma_alloc_vid_at(g, TEST_SIZE, test_mem, 0);
if (err != 0) {

7
userspace/units/pramin/nvgpu-pramin.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -37,6 +37,7 @@
#include <nvgpu/gk20a.h>
#include "hal/bus/bus_gk20a.h"
#include "hal/pramin/pramin_init.h"
#include <nvgpu/hw/gk20a/hw_pram_gk20a.h>
#include <nvgpu/hw/gk20a/hw_bus_gk20a.h>
@@ -66,7 +67,6 @@ static u32 *vidmem;
/* Simple pattern for memset operations */
#define MEMSET_PATTERN 0x12345678
static bool is_PRAM_range(struct gk20a *g, u32 addr)
{
if ((addr >= pram_data032_r(0)) &&
@@ -192,7 +192,8 @@ static int init_test_env(struct unit_module *m, struct gk20a *g)
/* Minimum HAL init for PRAMIN */
g->ops.bus.set_bar0_window = gk20a_bus_set_bar0_window;
g->ops.pramin.data032_r = pram_data032_r;
nvgpu_pramin_ops_init(g);
unit_assert(g->ops.pramin.data032_r != NULL, return -EINVAL);
/* Register space: BUS_BAR0 */
if (nvgpu_posix_io_add_reg_space(g, bus_bar0_window_r(), 0x100) != 0) {